LAN89218AQ_samples SMSC, LAN89218AQ_samples Datasheet - Page 25

Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl

LAN89218AQ_samples

Manufacturer Part Number
LAN89218AQ_samples
Description
Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl
Manufacturer
SMSC
Datasheet

Specifications of LAN89218AQ_samples

Ethernet Connection Type
10BASE-T, 100BASE-TX
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE802.3, IEEE802.3u
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
Datasheet
SMSC LAN89218
3.2
3.2.1
3.2.2
The receive and transmit FIFOs allow increased packet buffer storage to the MAC. The FIFOs are a
conduit between the host interface and the MAC through which all transmitted and received data and
status information is passed. Deep FIFOs allow a high degree of latency tolerance relative to the
various transport and OS software stacks reducing and minimizing overrun conditions. Like the MAC,
the FIFOs have separate receive and transmit data paths.
The LAN89218 can store up to 250 Ethernet packets utilizing FIFOs, totaling 16 kbytes, with a packet
granularity of 4 bytes. This memory is shared by the RX and TX blocks and is configurable in terms
of allocation. This depth of buffer storage minimizes or eliminates receive overruns.
The LAN89218 Ethernet MAC supports full-duplex flow control using the pause operation and control
frame. It also supports half-duplex flow control using back pressure.
Full-Duplex Flow Control
The pause operation inhibits data transmission of data frames for a specified period of time. A Pause
operation consists of a frame containing the globally assigned multicast address (01-80-C2-00-00-01),
the PAUSE opcode, and a parameter indicating the quantum of slot time (512 bit times) to inhibit data
transmissions. The PAUSE parameter may range from 0 to 65,535 slot times. The Ethernet MAC logic,
on receiving a frame with the reserved multicast address and PAUSE opcode, inhibits data frame
transmissions for the length of time indicated. If a Pause request is received while a transmission is
in progress, then the pause will take effect after the transmission is complete. Control frames are
received and processed by the MAC and are passed on.
The MAC also transmits control frames (pause command) via both hardware and software control. The
software driver requests the MAC to transmit a control frame and gives the value of the PAUSE time
to be used in the control frame. The MAC Function constructs a control frame with the appropriate
values set in all the different fields (as defined in the 802.3x specification) and transmits the frame to
the MII interface. The transmission of the control frame is not affected by the current state of the Pause
timer value that is set because of a recently received control frame.
Half-Duplex Flow Control (Backpressure)
In half-duplex mode, back pressure is used for flow control. Whenever the receive buffer/FIFO
becomes full or crosses a certain threshold level, the MAC starts sending a Jam signal. The MAC
transmit logic enters a state at the end of current transmission (if any), where it waits for the beginning
of a received frame. Once a new frame starts, the MAC starts sending the jam signal, which will result
in a collision. After sensing the collision, the remote station will back off its transmission. The MAC
continues sending the jam to make other stations defer transmission. The MAC only generates this
collision-based back pressure when it receives a new frame, in order to avoid any late collisions.
Flow Control
DATASHEET
25
Revision 1.3 (02-23-10)

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