28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 107

• Manufacturer Part Number: 28478G-18
• Description: Multichannel Synchronous Communications Controller 208-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of 28478G-18

• Package: 208BGA
• Maximum Data Rate: 32768 Kbps
• Transmission Media Type: Wire
• Power Supply Type: Analog
• Typical Supply Current: 250 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V

5.2.4.1
MUSYCC checks data from a message descriptor before processing the associated data buffer. When a data
buffer is completely processed (either transmitted or received), MUSYCC overwrites the buffer descriptor field (the
first dword in a message descriptor) with a buffer status descriptor.
The buffer status descriptor specifies the number of bytes transferred, an end of message indicator, and a buffer
owner-bit indicator that assigns control of associated buffers back to the host.
The owner bit transfers control of a data buffer between MUSYCC and the host. The message descriptor can be
assigned before an associated data buffer is allocated in memory. In this case, MUSYCC polls the contents of the
buffer descriptor until the host grants ownership of a data buffer to MUSYCC. After MUSYCC processes the data
buffer, it grants the ownership back to the host.
The owner bit prevents MUSYCC from processing the same buffer twice without intervention from the host. If
MUSYCC detects an opening flag of a received message, but does not have ownership of the current data buffer
(via the current message descriptor), an interrupt is sent to the host indicating that MUSYCC needed a data buffer
and did not have access to one.
The host can append additional information beyond the end of a data buffer as long as the longest message length
can be fitted first into the data buffer. In the case of additional information, MUSYCC would not know about the
information, nor would it ever read from or write to that space.
For simplicity, the message level descriptions that follow are made in reference to one channel. Each channel is
serviced independently of other channels, and separate descriptor lists are maintained for each supported
channel.
Similarly, the transmit and receive sections of a channel service that the descriptor lists identically and separate
descriptor lists are maintained for each section. Also, the size of data fields in the descriptors are identical;
however, the layout of fields between receive and transmit descriptors are different.
5.2.4.2
An interrupt from MUSYCC does not imply that MUSYCC read a buffer status descriptor and made it host-owned.
As mentioned in Note (2) in
update are not time correlated. The delay of the buffer status descriptor update is a maximum of 2 HDLC frames
after the interrupt.
The driver must read the owner field to confirm its ownership before writing a new buffer status descriptor. If the
driver receives an interrupt and does not detect a host-owned buffer, it should wait a minimum of 2 HDLC frames
before signaling an abnormal condition.
The requirement to check the buffer status descriptor is applicable only when buffer status descriptor updates are
enabled (INHRBSD = 0).
5.2.4.3
The head pointer points to the first message descriptor in a list of descriptors assigned to a channel’s transmitter or
receiver.
28478-DSH-002-E
NOTE:
Using Message Descriptors
Note for Interrupt Driven Drivers
Head Pointer
Preliminary Information / Mindspeed Proprietary and Confidential
Table
Since the 2 HDLC frame delay can't be translated directly into time, the host must always
verify the buffer is host-owned before reading the buffer status descriptor or writing a new
buffer descriptor. A generous time-out can be used by the host to detect the condition
where an interrupt has occurred, but there are no host-owned buffers to process.
5-31, the occurrence of a MUSYCC interrupt and a buffer status descriptor
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Memory Organization
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