28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 61
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28478G-18
Manufacturer Part Number
28478G-18
Description
Multichannel Synchronous Communications Controller 208-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.28478G-18.pdf
(195 pages)
Specifications of 28478G-18
Package
208BGA
Maximum Data Rate
32768 Kbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
250 mA
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
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Figure 3-2.
3.1
3.1.1
At initialization, MUSYCC’s PCI Function 1 Configuration Space is initialized with a value representing a 1 MB
memory range assigned to MUSYCC’s EBUS. This is detailed in
as EBUS—Function 1 Base Address Register. An unmapped 1 MB system memory range must be specified by
assigning the upper 12 bits of the memory range to the upper 12 bits of this register.
Command bit field memory space access control and optional parity error response must be properly configured
for MUSYCC to respond to EBUS memory space accesses (see
On reset, MUSYCC disables EBUS memory space access. If the PCI attempts to access EBUS memory space,
there will be a PCI master-abort termination.
3.1.2
When MUSYCC’s host interface claims the cycle during a PCI access cycle, the host interface compares the upper
12 bits of the PCI address lines to each of its function’s base address registers. If signal lines AD[31:20] are
identical to the upper 12 bits of the Expansion Bus Base Address register, MUSYCC forwards the access cycle to
the EBUS interface within MUSYCC.
MUYSCC accepts PCI slave burst write cycles to either function 0 or function 1.
MUSYCC’s host interface has an internal 4-dword write FIFO buffer shared by both functions; therefore a 1–4
dword burst write cycle can be performed to either function. When the burst write data phase exceeds the length,
MUSYCC asserts a PCI target disconnect.
28478-DSH-002-E
EBUS Functional Block Diagram without Local MPU
NOTE:
Operation
Initialization
Address and Data
8478_008
Preliminary Information / Mindspeed Proprietary and Confidential
Only single dword PCI operations can be performed when accessing the EBUS.
Interface
EBUS
Mindspeed Technologies
Address/Data
Control
EINT*
Clock
Table 2-14, Register 4, Address
Table 2-4, Register 1, Address
®
Downloadable
Peripheral
Local RAM
Devices
ROM
Expansion Bus (EBUS)
04h).
10h, and listed
48
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