C8051F340-GQR Silicon Laboratories Inc, C8051F340-GQR Datasheet - Page 95

• Manufacturer Part Number: C8051F340-GQR
• Description: MCU 8-Bit C8051F34x 8051 CISC 64KB Flash 3.3V/5V 48-Pin TQFP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F340-GQR

• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 40
• Interface Type: I2C/SMBus/SPI/UART/USB
• On-chip Adc: 17-chx10-bit
• Number Of Timers: 4
• Ram Size: 4.25 KB
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C

Bits7–2: UNUSED. Read = 000000b. Write = don’t care.
Bit1:
Bit0:
Bits7–2: UNUSED. Read = 000000b. Write = don’t care.
Bit1:
Bit0:
R/W
R/W
Bit7
Bit7
-
-
PS1: UART1 Interrupt Priority Control.
This bit sets the priority of the UART1 interrupt.
0: UART1 interrupt set to low priority level.
1: UART1 interrupts set to high priority level.
PVBUS: VBUS Level Interrupt Priority Control.
This bit sets the priority of the VBUS interrupt.
0: VBUS interrupt set to low priority level.
1: VBUS interrupt set to high priority level.
ES1: Enable UART1 Interrupt.
This bit sets the masking of the UART1 interrupt.
0: Disable UART1 interrupt.
1: Enable UART1 interrupt.
EVBUS: Enable VBUS Level Interrupt.
This bit sets the masking of the VBUS interrupt.
0: Disable all VBUS interrupts.
1: Enable interrupt requests generated by VBUS level sense.
R/W
R/W
Bit6
Bit6
SFR Definition 9.12. EIP2: Extended Interrupt Priority 2
SFR Definition 9.11. EIE2: Extended Interrupt Enable 2
-
-
R/W
Bit5
R/W
Bit5
-
-
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
R/W
Bit4
R/W
Bit4
-
-
Rev. 1.3
R/W
Bit3
R/W
Bit3
-
-
R/W
Bit2
R/W
Bit2
-
-
PS1
ES1
R/W
R/W
Bit1
Bit1
PVBUS
EVBUS
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
00000000
Reset Value
00000000
Reset Value
0xF7
0xE7
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