DEMO9S08LIN Freescale, DEMO9S08LIN Datasheet - Page 156

• Manufacturer Part Number: DEMO9S08LIN
• Manufacturer: Freescale

Specifications of DEMO9S08LIN

• Lead Free Status / RoHS Status: Compliant

Chapter 9 Liquid Crystal Display Driver (S08LCDV1)
9.5.1
The list below provides a recommended initialization sequence for the LCD module.
156
1. LCDCLKS register
2. LCDSUPPLY register
3. LCDCR1 register
4. LCDCR0 register
5. LCDBCTL register
6. FPENR[5:0] register
7. LCDCR0 register
a) Configure LCD clock source (SOURCE bit)
b) Adjust the clock source to achieve a value for LCDCLK of ~ 32 kHz (CLKADJ[5:0] & DIV16)
a) Enable charge pump (LCDCPEN bit)
b) Configure the LCD module for doubler or tripler mode (LCDCPMS bit)
c) Configure charge pump clock (CPCADJ[1:0])
d) Configure HDRVBUF
e) Configure op amp switch (BBYPASS bit)
f) Configure LCD power supply (VSUPPLY[1:0])
a) Configure the LCD frame frequency interrupt (LCDIEN bit)
b) Configure LCD behavior in low power mode (LCDWAI and LCDSTP3 bits)
a) Configure LCD duty cycle (DUTY[1:0])
b) Configure LPWAVE
c) Select and configure the LCD frame frequency (LCLK[2:0])
a) Configure the blink mode to blink individual or blink all segments (BLKMODE bit)
b) Configure the blink frequency (BRATE[2:0])
a) Enable the LCD module frontplane waveform output (FP[40:0]EN bits)
a) Enable the LCD module (LCDEN bit)
Initialization Sequence
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Freescale Semiconductor