DEMO9S08LIN Freescale, DEMO9S08LIN Datasheet - Page 24
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DEMO9S08LIN
Manufacturer Part Number
DEMO9S08LIN
Description
Manufacturer
Freescale
Datasheet
1.DEMO9S08LIN.pdf
(360 pages)
Specifications of DEMO9S08LIN
Lead Free Status / RoHS Status
Compliant
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Chapter 1 Device Overview
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Control bits inside the ICG determine which source is connected.
FFE is a control signal generated inside the ICG. If the frequency of ICGOUT > 4 × the frequency
of ICGERCLK, this signal is a logic 1 and the fixed-frequency clock will be the ICGERCLK.
Otherwise the fixed-frequency clock will be BUSCLK.
ICGLCLK — Development tools can select this internal self-clocked source (~ 8 MHz) to speed
up BDC communications in systems where the bus clock is slow.
ICGERCLK — External reference clock can be selected as the real-time interrupt clock source.
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Freescale Semiconductor