LAN9210-ABZJ Standard Microsystems (SMSC), LAN9210-ABZJ Datasheet - Page 17

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LAN9210-ABZJ

Manufacturer Part Number
LAN9210-ABZJ
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9210-ABZJ

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9210-ABZJ
Manufacturer:
Standard
Quantity:
2 500
Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9210
Auto-MDIX Enable
Crystal 1, Clock In
Wakeup Indicator
No Connect
Crystal 2
NAME
Reset
XTAL1/CLKIN
AMDIX_EN
SYMBOL
nRESET
XTAL2
PME
NC
Table 2.4 System and Power Signals
BUFFER
O8/OD8
OCLK
TYPE
lCLK
(PU)
(PU)
IS
I
DATASHEET
17
PINS
NUM
1
1
1
1
1
1
External 25MHz Crystal Input. This pin can also
No Connect. This pin must be left open.
be connected to single-ended TTL oscillator
(CLKIN). If this method is implemented, XTAL2
should be left unconnected.
External 25MHz Crystal output.
Active-low reset input. Resets all logic and
registers within the LAN9210. This signal is
pulled high with a weak internal pull-up resistor.
Note:
When programmed to do so, is asserted when
the LAN9210 detects a wake event and is
requesting the system to wake up from the
associated sleep state. The polarity and buffer
type of this signal is programmable.
Note:
Enables Auto-MDIX. Pull high or leave
unconnected to enable Auto-MDIX, pull low to
disable Auto-MDIX.
The LAN9210 must be reset on
power-up via nRESET or following
power-up via a soft reset (SRST). The
LAN9210 must always be read at least
once after reset, or upon return from a
power-saving state or write operations
will not function. See
"Detailed Reset Description," on
page 46
Detection of a Power Management
Event, and assertion of the PME
signal will not wakeup the LAN9210.
The LAN9210will only wake up when it
detects a host write cycle (assertion of
nCS and nWR). Although any write to
the LAN9210, regardless of the data
written, will wake-up the device when
it is in a power-saving mode, it is
required that the BYTE_TEST register
be used for this purpose.
DESCRIPTION
for additional information
Section 3.11,
Revision 2.7 (03-15-10)

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