LAN9210-ABZJ Standard Microsystems (SMSC), LAN9210-ABZJ Datasheet - Page 61
LAN9210-ABZJ
Manufacturer Part Number
LAN9210-ABZJ
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9210-ABZJ.pdf
(147 pages)
Specifications of LAN9210-ABZJ
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant
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Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9210
3.13.1
RX Slave PIO Operation
Using PIO mode, the host can either implement a polling or interrupt scheme to empty the received
packet out of the RX data FIFO. The host will remain in the idle state until it receives an indication
(interrupt or polling) that data is available in the RX data FIFO. The host will then read the RX status
FIFO to get the packet status, which will contain the packet length and any other status information.
The host should perform the proper number of reads, as indicated by the packet length plus the start
offset and the amount of optional padding added to the end of the frame, from the RX data FIFO.
Figure 3.18 Host Receive Routine Using Interrupts
Figure 3.19 Host Receive Routine with Polling
Last Packet
Last Packet
DATASHEET
RX_FIFO_
Read RX
Read RX
DWORD
Read RX
Read RX
DWORD
Packet
Packet
Status
Status
Read
Idle
init
INf
init
61
Valid Status DWORD
RX Interrupt
Not Last Packet
Not Last Packet
Revision 2.7 (03-15-10)
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