LAN9210-ABZJ Standard Microsystems (SMSC), LAN9210-ABZJ Datasheet - Page 38

• Manufacturer Part Number: LAN9210-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9210-ABZJ

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Compliant

Revision 2.7 (03-15-10)
3.9.2.1
If an operation is attempted, and an EEPROM device does not respond within 30mS, the LAN9210
will timeout, and the EPC timeout bit (EPC_TO) in the E2P_CMD register will be set.
Figure 3.4, "EEPROM Access Flow Diagram"
EEPROM Read or Write operation.
The host can disable the EEPROM interface through the GPIO_CFG register. When the interface is
disabled, the EEDIO and ECLK signals can be used as general-purpose outputs, or they may be used
to monitor internal MII signals.
Supported EEPROM Operations
The EEPROM controller supports the following EEPROM operations under host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in
page 101
Busy Bit = 0
for E2P_CMD field settings for each command.
EEPROM Write
Figure 3.4 EEPROM Access Flow Diagram
Write Data
Command
Command
Register
Register
Register
Write
Read
Idle
DATASHEET
Section 5.3.23, "E2P_CMD – EEPROM Command Register," on
38
illustrates the host accesses required to perform an
Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
EEPROM Read
Read Data
Command
Command
Register
Register
Register
Write
Read
Idle
Busy Bit = 0
SMSC LAN9210
Datasheet