FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 25

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FLLXT1000BA.C4QE000

Manufacturer Part Number
FLLXT1000BA.C4QE000
Description
Manufacturer
Intel
Datasheet

Specifications of FLLXT1000BA.C4QE000

Lead Free Status / RoHS Status
Not Compliant
2.3.2
2.3.2.1
Datasheet
Document #: 249276
Revision #: 002
Rev. Date: 07/20/01
CROSS = Low
CROSS = High
CROSS = Open
GMII
Copper MACs
TBI
Fiber “802.3z” MACs
Table 10. Crossover Control and Automatic Detection
Table 11. MAC Interface Modes of Operation
Configuration/
Purpose
Crossover Input
MAC Data Interface
The MAC Data Interface has two basic configurations as selected by the TBI configuration pin:
Modes of Operation
For the GMII configuration, the interface varies according to the speed of the link:
For the TBI Configuration, the interface is 10 bits x 125 MHz (supports 1000 only).
When no link is established (during auto-negotiation), clocks on the interface operate the same as
they do for the 10M MII mode.
GMII - supports 1000/100/10 links (TBI Configuration = Low)
TBI - supports 1000 only links (TBI Configuration = High)
1000 - GMII interface. 8 bits x 125 MHz
100 - MII interface. 4 bits x 25 MHz
10 - MII (4 bits x 2.5 MHz) or Serial (1bit x 10 MHz) as selected by the SER10 configuration
ball.
1000
100
10
1000
Speed
GMII (IEEE 802.3, Ch. 35)
MII (IEEE 802.3, Ch. 22)
MII (IEEE 802.3, Ch. 22)
Serial (No standard)
TBI (IEEE 802.3, Ch. 36)
DTE/NIC
Switch
Automatic
Mode/Standard
Application
Pair B - 3, 6
Pair A - 1, 2
Configured Accordingly
Gigabit Ethernet Transceiver — LXT1000
8 Bits x 125 MHz
4 Bits x 25 MHz
4 Bits x 2.5 MHz
1 Bit x 10 MHz
10 Bits x 125 MHz
Transmit Pair
Width
TBI = Low
TBI, SER10 = Low
TBI = Low, SER10 = High
TBI = High
Pair B -3, 6
Pair A -1, 2
How selected
Receive Pair
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