FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 64

• Manufacturer Part Number: FLLXT1000BA.C4QE000
• Manufacturer: Intel

Specifications of FLLXT1000BA.C4QE000

• Lead Free Status / RoHS Status: Not Compliant

LXT1000 — Gigabit Ethernet Transceiver
2.7.6
2.7.7
2.8
2.8.1
2.8.2
2.8.3
64
Jabber
If MAC transmission exceeds the jabber timer, the LXT1000 will disable the transmit and
loopback functions and assert the COL ball. The LXT1000 automatically exits jabber mode 250-
750 ms after the MAC ends transmission. The Jabber function can be disabled by setting bit
16.10 = 1.
Preamble Generation Mode
If preamble enable is enabled by setting bit 16.5 to a logical ‘1’, the MII RXD<3:0> bits will be set
to the preamble value, x’5’ whenever a preamble is received. If the preamble enable mode is
disabled, the RXD<3:0> bits will remain zero until the SFD is received. This mode may slightly
increase the latency. In 10BASE-T serial mode, the preamble is always transferred to the RXD0
ball.
LXT1000 Operating Requirements
Power
While operating, the LXT1000 requires a 3.3V, 1.5A power supply to all VCC balls. Apply power
to all VCC balls simultaneously. (Brief power-up transients to individual balls may be acceptable.)
Drive input balls only when power is supplied to the device. When power is supplied, all input balls
are 5V tolerant. Logic inputs, however, must meet the low and high voltage levels specified in this
data sheet (see
The MDIO/MDC interface cannot be powered separately from the rest of the MII interface.
Clock
A 25 MHz master clock source is required. The recommended means is to place a fundamental-
mode, parallel-resonant, 25 MHz crystal with 100 ppm (or better) stability across the XI/XO balls.
As an alternative, a 25 MHz clock can be provided to the XI ball, provided it meets certain
requirements (see
RBIAS
A 10.7 k , 1% resistor is required between the RBIAS input and ground. This resistor should be as
close to the device as possible, and the traces as short as possible. Keep all high-speed signals away
from the RBIAS ball. Use the traces from GND ball immediately adjacent to the RBIAS ball to
enclose the resistor and ball, forming a shielded area between the RBIAS connection and the
switching signals on the PCB.
•
•
•
Frequency error of no more than +/- 100 ppm
Jitter of no more than 50 ps
Rise-time no slower than 6 ns
“Test Specifications” on page
Table 34 on page
77).
75).
Document #: 249276
Rev. Date: 07/20/01
Revision #: 002
Datasheet