PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 233
PIC32MX210F016B-I/SO
Manufacturer Part Number
PIC32MX210F016B-I/SO
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Datasheet
1.PIC32MX210F016B-ISO.pdf
(320 pages)
- Current page: 233 of 320
- Download datasheet (7Mb)
REGISTER 26-5:
© 2011-2012 Microchip Technology Inc.
Legend:
R = Readable bit
-n = Value at POR
bit 31-14 Unimplemented: Read as ‘0’
bit 13
bit 12
bit 11-4
bit 3
bit 2-1
bit 0
Note 1:
Range
31:24
23:16
15:8
Bit
7:0
IOLOCK: Peripheral Pin Select Lock bit
1 = Peripheral Pin Select is locked. Writes to PPS registers is not allowed.
0 = Peripheral Pin Select is not locked. Writes to PPS registers is allowed.
PMDLOCK: Peripheral Module Disable bit
1 = Peripheral module is locked. Writes to PMD registers is not allowed.
0 = Peripheral module is not locked. Writes to PMD registers is allowed.
Unimplemented: Read as ‘0’
JTAGEN: JTAG Port Enable bit
1 = Enable the JTAG port
0 = Disable the JTAG port
Unimplemented: Read as ‘1’
TDOEN: TDO Enable for 2-Wire JTAG
1 = 2-wire JTAG protocol uses TDO
0 = 2-wire JTAG protocol does not use TDO
31/23/15/7
To change this bit, the unlock sequence must be performed. Refer to Section 6. “Oscillator” (DS61112)
in the “PIC32 Family Reference Manual” for details.
Bit
U-0
U-0
U-0
U-0
—
—
—
—
CFGCON: CONFIGURATION CONTROL REGISTER
30/22/14/6
Bit
U-0
U-0
U-0
U-0
—
—
—
—
W = Writable bit
‘1’ = Bit is set
29/21/13/5
IOLOCK
R/W-0
Bit
U-0
U-0
U-0
—
—
—
(1)
PMDLOCK
Preliminary
(1)
28/20/12/4
(1)
R/W-0
Bit
U-0
U-0
U-0
—
—
—
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
27/19/11/3
JTAGEN
R/W-1
Bit
U-0
U-0
U-0
—
—
—
PIC32MX1XX/2XX
26/18/10/2
Bit
U-0
U-0
U-0
U-0
—
—
—
—
x = Bit is unknown
25/17/9/1
Bit
U-0
U-0
U-0
U-1
—
—
—
—
DS61168D-page 233
24/16/8/0
TDOEN
R/W-1
Bit
U-0
U-0
U-0
—
—
—
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