PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 43

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PIC32MX210F016B-I/SO

Manufacturer Part Number
PIC32MX210F016B-I/SO
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Datasheet
TABLE 4-2:
Legend:
Note 1:
1000
1010 INTSTAT
1020
1030
1040
1060
1070
1090
10A0
10B0
10C0
10D0
10E0
10F0
1100
INTCON
2:
3:
IPTMR
IEC0
IEC1
IPC0
IPC1
IPC2
IPC3
IPC4
IPC5
IPC6
IPC7
IFS0
IFS1
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
With the exception of those noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4 0x8 and 0xC, respectively. See
SET and INV Registers”
These bits are not available on PIC32MX1XX devices.
This register does not have associated CLR, SET, INV registers.
(3)
31:16
31:16
31:16
31:16
31:16 DMA3IF
31:16
31:16 DMA3IE DMA2IE
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
INTERRUPT REGISTER MAP
IC3EIF
CNCIF
IC3EIE
CNCIE
FCEIF
FCEIE
31/15
DMA2IF
RTCCIE
RTCCIF
CNBIF
CNBIE
30/14
T3IE
T3IF
for more information.
FSCMIF
FSCMIE
DMA1IE
DMA1IF
INT2IF
INT2IE
CNAIE
CNAIF
29/13
I2C1MIF
I2C1MIE
DMA0IF
DMA0IE
OC2IF
AD1IE
OC2IE
MVEC
AD1IF
28/12
(1)
CMP1IP<2:0>
RTCCIP<2:0>
CMP3IP<2:0>
INT0IP<2:0>
INT1IP<2:0>
INT2IP<2:0>
INT3IP<2:0>
INT4IP<2:0>
SPI1IP<2:0>
CS0IP<2:0>
AD1IP<2:0>
IC1IP<2:0>
IC2IP<2:0>
IC3IP<2:0>
IC4IP<2:0>
IC5IP<2:0>
CTMUIF
CTMUIE
I2C1SIE
I2C1SIF
OC5IE
OC5IF
27/11
IC2IF
IC2IE
I2C2MIF
I2C2MIE
I2C1BIF
I2C1BIE
IC2EIE
IC2EIF
26/10
IC5IF
IC5IE
SRIPL<2:0>
TPC<2:0>
I2C2SIF
I2C2SIE
U1TXIF
U1TXIE
IC5EIE
IC5EIF
T2IF
T2IE
25/9
CMP1IS<1:0>
RTCCIS<1:0>
CMP3IS<1:0>
INT0IS<1:0>
INT1IS<1:0>
INT2IS<1:0>
INT3IS<1:0>
INT4IS<1:0>
SPI1IS<1:0>
CS0IS<1:0>
AD1IS<1:0>
IC1IS<1:0>
IC2IS<1:0>
IC3IS<1:0>
IC4IS<1:0>
IC5IS<1:0>
IPTMR<31:0>
I2C2BIF
I2C2BIE
U1RXIE
U1RXIF
INT1IE
INT1IF
24/8
T5IF
T5IE
Bits
U2TXIF
U2TXIE
INT4IF
OC1IF
INT4IE
OC1IE
U1EIF
U1EIE
23/7
SPI1TXIF
SPI1TXIE
U2RXIE
U2RXIF
OC4IF
OC4IE
IC1IF
IC1IE
22/6
SPI1RXIF
SPI1RXIE
IC1EIE
IC1EIF
U2EIF
U2EIE
IC4IE
IC4IF
21/5
SPI2TXIF SPI2RXIF SPI2EIF PMPEIF PMPIF
SPI2TXIE SPI2RXIE SPI2EIE PMPEIE PMPIE
SPI1EIE
SPI1EIF
INT4EP
IC4EIF
IC4EIE
20/4
T1IF
T1IE
FSCMIP<2:0>
USBIP<2:0>
CMP2IP<2:0>
CS1IP<2:0>
OC1IP<2:0>
OC2IP<2:0>
OC3IP<2:0>
OC4IP<2:0>
OC5IP<2:0>
FCEIP<2:0>
CTIP<2:0>
T1IP<2:0>
T2IP<2:0>
T3IP<2:0>
T4IP<2:0>
T5IP<2:0>
USBIF
USBIE
INT3EP
VEC<5:0>
INT0IF
INT0IE
T4IF
T4IE
19/3
(2)
(2)
(2)
CMP3IF CMP2IF CMP1IF
CMP3IE CMP2IE CMP1IE
INT2EP INT1EP INT0EP
INT3IF
INT3IE
CS1IF
CS1IE
18/2
OC3IF
OC3IE
CS0IE
CS0IF
USBIS<1:0>
17/1
FSCMIS<1:0>
CMP2IS<1:0>
OC1IS<1:0>
OC2IS<1:0>
OC3IS<1:0>
OC4IS<1:0>
OC5IS<1:0>
FCEIS<1:0>
CS1IS<1:0>
CTIS<1:0>
T1IS<1:0>
T2IS<1:0>
T3IS<1:0>
T4IS<1:0>
T5IS<1:0>
Section 11.2 “CLR,
IC3IF
IC3IE
CTIF
CTIE
16/0
SS0
(2)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000

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