S25FL032P0XMFI011 Spansion Inc., S25FL032P0XMFI011 Datasheet - Page 43

no-image

S25FL032P0XMFI011

Manufacturer Part Number
S25FL032P0XMFI011
Description
IC 32M CMOS 3V 104MHZ SPI BUS INTERFACE
Manufacturer
Spansion Inc.
Datasheet

Specifications of S25FL032P0XMFI011

Cell Type
NOR
Density
32Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Boot Type
Bottom/Top
Address Bus
1b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC W
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
38mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S25FL032P0XMFI011
Manufacturer:
SPANSION
Quantity:
4 391
Part Number:
S25FL032P0XMFI011
Manufacturer:
SPANSION
Quantity:
20 000
Company:
Part Number:
S25FL032P0XMFI011
Quantity:
664
Company:
Part Number:
S25FL032P0XMFI011
Quantity:
5 974
Part Number:
S25FL032P0XMFI0119
Manufacturer:
SPAN
Quantity:
6 142
9.16
October 5, 2009 S25FL032P_00_05
Parameter Sector Erase (P4E, P8E)
The Parameter Sector Erase (P4E, P8E) command sets all bits at all addresses within a specified sector to a
logic 1 (FFh). A WREN command is required prior to writing the Parameter Sector Erase commands.
The host system must drive CS# low, and then write the P4E or P8E command, plus three address bytes on
SI. Any address within the sector (see
CS# must be driven low for the entire duration of the P4E/P8E sequence. The command sequence is shown
in
The host system must drive CS# high after the device has latched the 24th bit of the P4E/P8E address,
otherwise the device does not execute the command. The parameter sector erase operation begins as soon
as CS# is driven high. The device internally controls the timing of the operation, which requires a period of
t
parameter sector erase operation is in progress. The WIP bit is 1 during the P4E/P8E operation, and is 0
when the operation is completed. The device internally resets the Write Enable Latch to 0 before the
operation completes (the exact timing is not specified).
A Parameter Sector Erase (P4E, P8E) instruction applied to a sector that has been Write Protected through
the Block Protect Bits will not be executed.
The Parameter Sector Erase Command (P8E) erases two of the 4 KB Sectors in selected address space.
The Parameter Sector Erase Command (P8E) erases two sequential 4 KB Parameter Sectors in the selected
address space. The address LSB is disregarded so that two sequential 4 KB Parameter Sectors are erased.
The 24 Bit Address is any location within the first Sector to be erased (n), and the next sequential 4 KB
Parameter Sector will also be erased (n+1). The 4 KB parameter Sector will only be erased properly if n or
n+1 is a valid 4 KB parameter Sector. i.e. If n is not a valid 4K parameter Sector, then it will not be erased. If
n+1 is not a valid 4 KB parameter Sector, then it will not be erased.
SE
Figure 9.19
. The Status Register may be read to check the value of the Write In Progress (WIP) bit while the
SCK
CS#
SI
and
Table 9.1 on page
Figure 9.19 Parameter Sector Erase (P4E, P8E) Instruction Sequence
0
D a t a
1
2
Instruction
S h e e t
3
23.
Table 5.1 on page
20h or 40h
S25FL032P
4
5
6
7
MSB
23
8
13) is a valid address for the P4E or P8E command.
22
9
24 Bit Address
21
1
0
28
3
29
2
30
1
31
0
43

Related parts for S25FL032P0XMFI011