S25FL032P0XMFI011 Spansion Inc., S25FL032P0XMFI011 Datasheet - Page 44

• Manufacturer Part Number: S25FL032P0XMFI011
• Description: IC 32M CMOS 3V 104MHZ SPI BUS INTERFACE
• Manufacturer: Spansion Inc.

Specifications of S25FL032P0XMFI011

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Boot Type: Bottom/Top
• Address Bus: 1b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC W
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 4M
• Supply Current: 38mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / Rohs Status: Compliant

9.17
44
Sector Erase (SE)
The Sector Erase (SE) command sets all bits at all addresses within a specified sector to a logic 1. A WREN
command is required prior to writing the SE command.
The host system must drive CS# low, and then write the SE command plus three address bytes on SI. Any
address within the sector (see
driven low for the entire duration of the SE sequence. The command sequence is shown in
Table 9.1 on page
The host system must drive CS# high after the device has latched the 24th bit of the SE address, otherwise
the device does not execute the command. The SE operation begins as soon as CS# is driven high. The
device internally controls the timing of the operation, which requires a period of t
be read to check the value of the Write In Progress (WIP) bit while the SE operation is in progress. The WIP
bit is 1 during the SE operation, and is 0 when the operation is completed. The device internally resets the
Write Enable Latch to 0 before the operation completes (the exact timing is not specified).
The device only executes a SE command if all Block Protect bits (BP2:BP0) are 0 (see
on page
CS#
SCK
SI
SO
18). Otherwise, the device ignores the command.
Hi-Z
Mode 3
Mode 0
23.
0
Figure 9.20 Sector Erase (SE) Command Sequence
Table 7.3 on page
1
2
Command
3
S25FL032P
4
D a t a
5
18) is a valid address for the SE command. CS# must be
6
S h e e t
7
MSB
23 22
8
9
24 bit Address
21
10
28
3
S25FL032P_00_05 October 5, 2009
29
2
SE
30
1
. The Status Register may
31
0
Table 7.3
Figure 9.20
and