TDA9955HL/17/C1:55 NXP Semiconductors, TDA9955HL/17/C1:55 Datasheet - Page 18

• Manufacturer Part Number: TDA9955HL/17/C1:55
• Description: TDA9955HL/LQFP100/TRAYBDP//17/
• Manufacturer: NXP Semiconductors
• Type: Videor

Specifications of TDA9955HL/17/C1:55

• Resolution (bits): 8 b
• Sampling Rate (per Second): 170M
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.75 V ~ 1.85 V, 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935281545551; TDA9955HL/17/C1-S; TDA9955HL/17/C1-S

NXP Semiconductors
TDA9955HL_1
Product data sheet
9.2.4 PLL registers
Table 8.
Legend: * = default value
[1]
Table 9.
Legend: * = default value
[1]
Bit Symbol Access Value Description
6
5
4
3
2
1
0
Bit
7
6 to 4 -
3
2 to 0
When one of these bits changes, the VAI_N pin is pulled down until SDRS_FLAGS0 is read.
By default, the SDRS toggles automatically the HSYNC to have an internal positive HSYNC signal
SOGD2 R
-
DSSD2 R
-
SOGD1 R
-
DSSD1 R
Symbol Access Value Description
EDG
SDRS_FLAGS register (address 0Dh) bit description
PLL_CTRL register (address 10h) bit description
R
R
R
R
0*
1
0*
1
0*
1
0*
1
Rev. 01 — 17 March 2008
-
0*
1
sync on green detected: on pin SOG2
not used
digital separated syncs detected: on pins VSYNC2 and
HCSYNC2
not used
sync on green detected: on pin SOG1
not used
digital separated syncs detected: on pins VSYNC1 and
HCSYNC1
pulses are not detected
pulses are detected
pulses are not detected
pulses are detected
pulses are not detected
pulses are detected
pulses are not detected
pulses are detected
reserved for test
not used
edge: synchronizes the PLL on the internal HSYNC pulses
reserved for test
Triple 8-bit analog-to-digital video converter for HDTV
on the rising edge
on the falling edge
[1]
…continued
TDA9955HL
© NXP B.V. 2008. All rights reserved.
18 of 52