TDA9955HL/17/C1:55 NXP Semiconductors, TDA9955HL/17/C1:55 Datasheet - Page 25

TDA9955HL/LQFP100/TRAYBDP//17/

TDA9955HL/17/C1:55

Manufacturer Part Number
TDA9955HL/17/C1:55
Description
TDA9955HL/LQFP100/TRAYBDP//17/
Manufacturer
NXP Semiconductors
Type
Videor
Datasheet

Specifications of TDA9955HL/17/C1:55

Resolution (bits)
8 b
Sampling Rate (per Second)
170M
Data Interface
Serial
Voltage Supply Source
Analog and Digital
Voltage - Supply
1.75 V ~ 1.85 V, 3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935281545551
TDA9955HL/17/C1-S
TDA9955HL/17/C1-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA9955HL/17/C1:55
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 25.
Legend: * = default value
[1]
[2]
Table 26.
Legend: * = default value
[1]
[2]
TDA9955HL_1
Product data sheet
Addr Register
85h
86h
Addr Register
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
The default values correspond with the RGB full-scale to YC
The value is signed 11-bit two’s complement integer.
The default values of the coefficients correspond with the RGB full-scale to YC
The value is signed 11-bit two’s complement integer.
MAT_OI3_MSB 7 to 3 -
MAT_OI3_LSB
-
MAT_P11_MSB 7 to 3 -
MAT_P11_LSB 7 to 0 P11[7:0]
MAT_P12_MSB 7 to 3 -
MAT_P12_LSB 7 to 0 P12[7:0]
MAT_P13_MSB 7 to 3 -
MAT_P13_LSB 7 to 0 P13[7:0]
MAT_P21_MSB 7 to 3 -
MAT_P21_LSB 7 to 0 P21[7:0]
MAT_P22_MSB 7 to 3 -
MAT_P22_LSB 7 to 0 P22[7:0]
MAT_P23_MSB 7 to 3 -
MAT_P23_LSB 7 to 0 P23[7:0]
MAT_P31_MSB 7 to 3 -
MAT_P31_LSB 7 to 0 P31[7:0]
MAT_P32_MSB 7 to 3 -
MAT_P32_LSB 7 to 0 P32[7:0]
MAT_P33_MSB 7 to 3 -
MAT_P33_LSB 7 to 0 P33[7:0]
Offset input registers (address 81h to 86h) bit description
Coefficient registers (address 87h to 98h) bit description
[1]
[1]
Bit
2 to 0 MAT_OI3[8:6]
7 to 0 OFFSET_IN3[5:0]
1 to 0 -
Bit
2 to 0 P11[10:8] W
2 to 0 P12[10:8] W
2 to 0 P13[10:8] W
2 to 0 P21[10:8] W
2 to 0 P22[10:8] W
2 to 0 P23[10:8] W
2 to 0 P31[10:8] W
2 to 0 P32[10:8] W
2 to 0 P33[10:8] W
Symbol
Symbol
Access Value
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Rev. 01 — 17 March 2008
Access Value
W
W
W
W
0 0000* not used
010*
02h*
0 0000* not used
001*
06h*
0 0000* not used
000*
64h*
0 0000* not used
110*
89h*
0 0000* not used
001*
C0h*
0 0000* not used
111*
B7h*
0 0000* not used
110
D7h*
0 0000* not used
111*
69h*
0 0000* not used
001*
C0h*
B
C
R
Triple 8-bit analog-to-digital video converter for HDTV
ITU-R BT.601 reduced-scale conversion.
0 0000* not used
000*
00h*
00*
Description
coefficient (1,1): coefficient from the G/Y channel to the
G/Y channel
coefficient (1,2): coefficient from the R/C
G/Y channel
coefficient (1,3): coefficient from the B/C
G/Y channel
coefficient (2,1): coefficient from the G/Y channel to the
R/C
coefficient (2,2): coefficient from the R/C
R/C
coefficient (2,3): coefficient from the B/C
R/C
coefficient (3,1): coefficient from the G/Y channel to the
B/C
coefficient (3,2): coefficient from the R/C
B/C
coefficient (3,3): coefficient from the B/C
B/C
B
B
B
R
R
R
channel
channel
channel
channel
channel
channel
Description
offset_in3 compensate the brightness value for
the channel B/U, e.g. with YC
C
not used
B
B
…continued
C
[2]
[2]
[2]
so OFFSET_IN3 = 1000 0000b = 80h
R
[2]
[2]
[2]
[2]
[2]
[2]
ITU-R BT601 reduced scale conversion.
TDA9955HL
B
C
© NXP B.V. 2008. All rights reserved.
R
R
B
R
B
R
B
channel to the
channel to the
channel to the
input, 128 for
channel to the
channel to the
channel to the
[2]
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