DP83934CVUL20 National Semiconductor, DP83934CVUL20 Datasheet - Page 37

• Manufacturer Part Number: DP83934CVUL20
• Manufacturer: National Semiconductor

Specifications of DP83934CVUL20

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

WATCHDOG COUNTERS
SILICON REVISION
TRANSMIT REGISTERS
RECEIVE REGISTERS
ADDRESS GENERATORS
6 0 SONIC-T Registers
Note 1 These registers can only be read when the SONIC-T is in reset mode (RST bit in the CR is set) The SONIC-T gives invalid data when these registers are
read in non-reset mode
Note 2 This register can only be written to when the SONIC-T is in reset mode This register is normally only loaded by the Load CAM command
Note 3 The Data Configuration registers DCR and DCR2 can only be written to when the SONIC-T is in reset mode (RST bit in CR is set) Writing to these
registers while not in reset mode does not alter the registers
Note 4 The data written to these registers is inverted before being latched That is if a value of FFFFh is written these registers will contain and read back the
value of 0000h Data is not inverted during a read operation
Note 1 The data that is read from these registers is the inversion of what has been written to them
Note 2 The value that is written to this register is shifted once in 16-bit mode and shifted twice in 32-bit mode
(RA5 –RA0)
30
3E
(RA5–RA0)
0C (Note 2)
08 (Note 1)
RA5 –RA0
0A
0B
1A
1B
1C
1D
1E
09
20
2F
0F
10
11
12
19
1F
2A
29
28
TABLE 6-3 National Factory Test Registers (Users should not access these registers)
Access
R W
TABLE 6-2 Internal Use Registers (Users should not write to these registers)
Access
R W
R W
R W
R W
R W
R W
R
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
R W
Access
R W
R W
R
These registers are for factory use only Users must not
address these registers or improper SONIC-T operation
can occur
(Continued)
Transmit Packet Size
Transmit Fragment Count
Transmit Start Address 0
Transmit Start Address 1
Transmit Fragment Size
Temporary Transmit Descriptor Address
Maximum Deferral Timer
Current Receive Buffer Address 0
Current Receive Buffer Address 1
Remaining Buffer Word Count 0
Remaining Buffer Word Count 1
Temporary Receive Buffer Address 0
Temporary Receive Buffer Address 1
Temporary Buffer Word Count 0
Temporary Buffer Word Count 1
Last Link Field Address
Address Generator 0
Address Generator 1
TABLE 6-1 User Registers (Continued)
Watchdog Timer
Watchdog Timer 1
Silicon Revision
Register
Register
Register
37
Symbol
WT0
WT1
SR
Symbol
TPS
TFC
TSA0
TSA1
TFS
TTDA
MDT
CRBA0
CRBA1
RBWC0
RBWC1
TRBA0
TRBA1
TBWC0
TBWC1
LLFA
ADDR0
ADDR1
Symbol
none
Description
6 3 12
6 3 12
6 3 13
(section)
5 5
5 5
5 5
5 5
5 5
5 5 4
6 3 4
5 4 2 5 4 4 2
5 4 2 5 4 4 2
5 4 2 5 4 4 2
5 4 2 5 4 4 2
5 4 6 2
5 4 6 2
5 4 6 2
5 4 6 2
none
none
none
Description
(section)
Description
(section)
none