DP83934CVUL20 National Semiconductor, DP83934CVUL20 Datasheet - Page 74

• Manufacturer Part Number: DP83934CVUL20
• Manufacturer: National Semiconductor

Specifications of DP83934CVUL20

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

8 0 Network Interfacing
External ENDEC When EXT
passed and the signals are provided directly to the user
Since SONIC-T’s on-chip ENDEC is the same as National’s
DP83910 Serial Network Interface (SNI) the interface con-
siderations discussed in this section would also apply to
using this device in the external ENDEC mode
8 1 MANCHESTER ENCODER AND
DIFFERENTIAL DRIVER
The ENDEC unit’s encoder begins operation when the MAC
section begins sending the serial data stream It converts
NRZ data from the MAC section to Manchester data for the
differential drivers (TX
half of the bit cell contains the complementary data and the
second half contains the true data (Figure 8-3) A transition
always occurs at the middle of the bit cell As long as the
MAC continues sending data the ENDEC section remains
in operation At the end of transmission the last transition is
always positive occurring at the center of the bit cell if the
last bit is a one or at the end of the bit cell if the last bit is a
zero
The differential transmit pair drives up to 50 meters of twist-
ed pair AUI cable These outputs are source followers which
require two 270
a pulse transformer is required between the transmit pair
output and the AUI interface
The driver provides full-step mode for compatibility with
Ethernet and IEEE 802 3 so that TX
in the idle state
8 1 1 Manchester Decoder
The decoder consists of a differential receiver and a phase
lock loop (PLL) to separate the Manchester encoded data
stream into clock signals and NRZ data The differential in-
put must be externally terminated with two 39
connected in series In addition a pulse transformer is re-
quired between the receive input pair and the AUI interface
To prevent noise from falsely triggering the decoder a
squelch circuit at the input rejects signals with a magnitude
less than
are decoded
Once the input exceeds the squelch requirements the de-
coder begins operation The decoder may tolerate bit jitter
up to 18 ns in the received data The decoder detects the
end of a frame within one and a half bit times after the last
bit of data
8 1 2 Collision Translator
When the Ethernet transceiver (DP8392 CTI) detects a colli-
sion it generates a 10 MHz signal to the differential collision
inputs (CD
FIGURE 8 3 Manchester Encoded Data Stream
b
a
175 mV Signals more negative than
and CD
pull-down resistors to ground In addition
b
g
) In Manchester encoding the first
) of the SONIC-T When SONIC-T
e
1 the internal ENDEC is by-
a
and TX
(Continued)
b
TL F 11719–53
b
are equal
resistors
300 mV
74
8-4 and suggested oscillator specifications are shown in Ta-
detects these inputs active its Collision translator converts
the 10 MHz signal to an active collision signal to the MAC
section This signal causes SONIC-T to abort its current
transmission and reschedule another transmission attempt
The collision differential inputs are terminated the same way
as the differential receive inputs and a pulse transformer is
required between the collision input pair and the AUI inter-
face The squelch circuitry is also similar rejecting pulses
with magnitudes less than
8 1 3 Oscillator Inputs
The oscillator inputs to the SONIC-T (OSCIN and OSCOUT)
can be driven with a parallel resonant crystal or an external
clock In either case the oscillator inputs must be driven with
a 20 MHz signal The signal is divided by 2 to generate the
10 MHz transmit clock (TXC) for the MAC unit The oscilla-
tor also provides internal clock signals for the encoding and
decoding circuits
8 1 3 1 External Crystal
According to the IEEE 802 3 standard the transmit clock
(TXC) must be accurate to 0 01% This means that the os-
cillator circuit which includes the crystal and other parts
involved must be accurate to 0 01% after the clock has
been divided in half Hence when using a crystal it is nec-
essary to consider all aspects of the crystal circuit An ex-
ample of a recommended crystal circuit is shown in Figure
ble 8-1 The load capacitors in Figure 8-4 C1 and C2
should be no greater than 36 pF each including all stray
capacitance (see note 2) The resistor R1 may be required
in order to minimize frequency drift due to changes in V
R1 is required its value must be carefully selected since R1
decreases the loop gain If R1 is made too large the loop
gain will be greatly reduced and the crystal will not oscillate
If R1 is made too small normal variations in V
the oscillation frequency to drift out of specification As a
first rule of thumb the value of R1 should be made equal to
five times the motional resistance of the crystal The mo-
tional resistance of 20 MHz crystals is usually in the range
of 10
should be in the range of 50
whether or not to include R1 should be based upon mea-
sured variations of crystal frequency as each of the circuit
parameters are varied
Note 1 The OSCOUT pin is not guaranteed to provide a TTL compatible
Note 2 The frequency marked on the crystal is usually measured with a
FIGURE 8-4 Crystal Connection to the SONIC-T
logic output and should not be used to drive any external logic If
additional logic needs to be driven then an external oscillator
should be used as described in the following section
fixed load capacitance specified in the crystal’s data sheet The
actual load capacitance used should be the specified value minus
the stray capacitance
to 30
This implies that reasonable values for R1
(see text)
b
175 mV
to 150
The decision of
CC
TL F 11719 – 54
may cause
CC
If