MT45W512KW16PGA-70 WT Micron Technology Inc, MT45W512KW16PGA-70 WT Datasheet - Page 14

MT45W512KW16PGA-70 WT

Manufacturer Part Number
MT45W512KW16PGA-70 WT
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT45W512KW16PGA-70 WT

Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
TCR (CR[6:5]) Default = On-Chip Temperature Sensor
Page Mode READ Operation (CR[7]) Default = Disabled
PDF: 09005aef8220472e/Source: 09005aef8220461e
8mb_asyncpage_ps1_0_p23z.fm - Rev. A 7/06 EN
DPD operation disables all refresh-related activity. This mode will be used when the
system does not require the storage provided by the PSRAM device. Any stored data will
become corrupted when DPD is enabled. When refresh activity has been re-enabled, the
PSRAM device will require 150µs to perform an initialization procedure before normal
operation can resume. DPD should not be enabled using CR software access.
This PSRAM device includes an on-chip temperature sensor that automatically adjusts
the refresh rate according to the operating temperature. The on-chip TCR is enabled by
clearing both of the TCR bits in the refresh configuration register (CR[6:5] = 00b). Any
other TCR setting enables a fixed refresh rate. When the on-chip temperature sensor is
enabled, the device continually adjusts the refresh rate according to the operating
temperature.
The TCR bits also allow for adequate fixed rate refresh at three different temperature
thresholds (+15°C, +45°C, and +85°C). The setting selected must be for a temperature
higher than the case temperature of the PSRAM device. If the case temperature is
+35°C, the system can minimize self-refresh current consumption by selecting the
+45°C setting. Using the +15°C setting in the same environment would result in an
inadequate refresh rate and cause data corruption.
The page mode operation bit determines whether page mode READ operations are
enabled. In the power-up default state, page mode is disabled.
14
Configuration Register (CR) Operation
Micron Technology, Inc., reserves the right to change products or specifications without notice.
8Mb: 512K x 16 Async/Page PSRAM
©2006 Micron Technology, Inc. All rights reserved.
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