FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 267
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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Register and Memory Mapping
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
The ICH5 contains registers that are located in the processor’s I/O space and memory space and
sets of PCI configuration registers that are located in PCI configuration space. This chapter
describes the ICH5 I/O and memory maps at the register-set level. Register access is also
described. Register-level address maps and Individual register bit descriptions are provided in the
following chapters. The following notations and definitions are used in the register/instruction
description chapters.
RO
WO
R/W
R/WC
R/WO
Default
Bold
Read Only. In some cases, If a register is read only, writes to this register location
have no effect. However, in other cases, two separate registers are located at the
same location where a read accesses one of the registers and a write accesses the
other register. See the I/O and memory map tables for details.
Write Only. In some cases, If a register is write only, reads to this register location
have no effect. However, in other cases, two separate registers are located at the
same location where a read accesses one of the registers and a write accesses the
other register. See the I/O and memory map tables for details.
Read/Write. A register with this attribute can be read and written.
Read/Write Clear. A register bit with this attribute can be read and written.
However, a write of 1 clears (sets to 0) the corresponding bit and a write of 0 has
no effect.
Read/Write-Once. A register bit with this attribute can be written only once after
power up. After the first write, the bit becomes read only.
When ICH5 is reset, it sets its registers to predetermined default states. The default
state represents the minimum functionality feature set required to successfully
bring up the system. Hence, it does not represent the optimal system
configuration. It is the responsibility of the system initialization software to
determine configuration, operating parameters, and optional system features that
are applicable, and to program the ICH5 registers accordingly.
Register bits that are highlighted in bold text indicate that the bit is implemented
in the ICH5. Register bits that are not implemented or are hardwired will remain
in plain text.
Register and Memory Mapping
6
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