FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 607
FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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®
Table 183. Clock Timings (Sheet 2 of 2)
82801EB ICH5 / 82801ER ICH5R Datasheet
NOTES:
1. The USBCLK is a 48 MHz that expects a 40/60% duty cycle.
2. USBCLK is a pass-thru clock that is not altered by the ICH5. This frequency tolerance specification is
3. The maximum high time (t18 Max) provide a simple guaranteed method for devices to detect bus idle
4. BITCLK Rise and Fall times are measured from 10%VDD and 90%VDD.
5. This specification includes pin-to-pin skew from the clock generator as well as board skew.
6. SUSCLK duty cycle can range from 30% minimum to 70% maximum.
f susclk
f ac97
Sym
t39b
t26
t27
t28
t29
t30
t31
t32
t33
t34
t35
t36
t37
t38
t39
required for USB 2.0 compliance and is affected by external elements such as the clock generator and the
system board.
conditions.
f hi
Operating Frequency
Output Jitter
High time
Low time
Rise time
Fall time
Operating Frequency
High time
Low time
Rise time
Fall time
CLK66 leads PCICLK
Period
Rise time
Fall time
Operating Frequency
High Time
Low Time
Parameter
SATA Clock (CLk100P, CLK100N)
Suspend Clock (SUSCLK)
AC’97 Clock (BITCLK)
Hub Interface Clock
32.56
32.56
9.997
0.25
0.25
Min
175
175
2.0
2.0
6.0
6.0
1.0
10
10
12.288
66
32
10.003
48.84
48.84
Max
750
700
700
6.0
6.0
1.2
1.2
4.5
Electrical Characteristics
MHz
MHz
Unit
kHz
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
us
us
4
4
5
6
6
6
Notes
3
3
3
3
3
3
3
3
Figure
607
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