FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 646
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
Lead Free Status / RoHS Status
Not Compliant
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Register Index
646
Table 204. Intel
Sub Class Code
Base Class Code
Header Type
Base Address Register
Subsystem Vendor ID
Subsystem ID
Interrupt Line
Interrupt Pin
Serial Bus Release Number
USB Legacy Keyboard/
Mouse Control
USB Resume Enable
Vendor ID
Device ID
Command Register
Device Status
Revision ID
Programming Interface
Sub Class Code
Base Class Code
Master Latency Timer
Header Type
Base Address Register
Subsystem Vendor ID
Subsystem ID
Capabilities Pointer
®
Register Name
ICH5 PCI Configuration Registers (Sheet 8 of 11)
2C – 2Dh
C0 – C1h
2C – 2Dh
2E – 2Fh
2E – 2Fh
20 – 23h
04 – 05h
20 – 23h
00 – 01h
02 – 03h
06 – 07h
Offset
0Ah
0Bh
0Eh
3Ch
3Dh
C4h
0Ah
0Bh
0Dh
0Eh
60h
08h
09h
34h
EHCI Controller (D29:F7)
Section 12.1.7, “SCC—Sub Class Code Register (USB—
D29:F0/F1/F2/F3)” on page 464
Section 12.1.8, “BCC—Base Class Code Register (USB—
D29:F0/F1/F2/F3)” on page 464
Section 12.1.9, “HEADTYP—Header Type Register (USB—
D29:F0/F1/F2/F3)” on page 465
Section 12.1.10, “BASE—Base Address Register (USB—
D29:F0/F1/F2/F3)” on page 465
Section 12.1.11, “SVID — Subsystem Vendor Identification
Register (USB—D29:F0/F1/F2/F3)” on page 466
Section 12.1.12, “SID — Subsystem Identification Register
(USB—D29:F0/F1/F2/F3)” on page 466
Section 12.1.13, “INT_LN—Interrupt Line Register (USB—
D29:F0/F1/F2/F3)” on page 466
Section 12.1.14, “INT_PN—Interrupt Pin Register (USB—
D29:F0/F1/F2/F3)” on page 467
Section 12.1.15, “USB_RELNUM—Serial Bus Release Number
Register (USB—D29:F0/F1/F2/F3)” on page 467
Section 12.1.16, “USB_LEGKEY—USB Legacy Keyboard/
Mouse Control Register (USB—D29:F0/F1/F2/F3)” on page 468
Section 12.1.17, “USB_RES—USB Resume Enable Register
(USB—D29:F0/F1/F2/F3)” on page 470
Section 13.1.3, “PCICMD—PCI Command Register (USB
EHCI—D29:F7)” on page 481
Section 13.1.4, “PCISTS—PCI Status Register (USB EHCI—
D29:F7)” on page 482
Section 13.1.6, “PI—Programming Interface Register (USB
EHCI—D29:F7)” on page 483
Section 13.1.7, “SCC—Sub Class Code Register (USB EHCI—
D29:F7)” on page 483
Section 13.1.8, “BCC—Base Class Code Register (USB EHCI—
D29:F7)” on page 483
Section 13.1.9, “PMLT—Primary Master Latency Timer Register
(USB EHCI—D29:F7)” on page 484
Section 13.1.10, “MEM_BASE—Memory Base Address
Register (USB EHCI—D29:F7)” on page 484
Section 13.1.11, “SVID—USB EHCI Subsystem Vendor ID
Register (USB EHCI—D29:F7)” on page 484
Section 13.1.12, “SID—USB EHCI Subsystem ID Register (USB
EHCI—D29:F7)” on page 485
Section 13.1.13, “CAP_PTR—Capabilities Pointer Register
(USB EHCI—D29:F7)” on page 485
Intel
®
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