FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 609
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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Intel
®
Table 185. IDE PIO and Multiword DMA ModeTiming
82801EB ICH5 / 82801ER ICH5R Datasheet
NOTES:
1. IORDY is internally synchronized. This timing is to guarantee recognition on the next clock.
2. PIORDY sample point from DIOx# assertion and PDIOx# active pulse width is programmable from 2
3. PIORDY sample point from DIOx# assertion, PDIOx# active pulse width and PDIOx# inactive pulse width
4. PDIOx# inactive pulse width is programmable from 1
Sym
t60
t61
t62
t63
t64
t65
t66
t67
t68
t69
t70
t71
t72
t73
t74
t75
t76
clocks when the drive mode is Mode 2 or greater. Refer to the ISP field in the IDE Timing Register.
cycle time is the compatible timing when the drive mode is Mode 0/1. Refer to the TIM0/1 field in the IDE
timing register.
greater. Refer to the RCT field in the IDE Timing Register.
PDIOR#/PDIOW#/SDIOR#/SDIOW# Active From
CLK66 Rising
PDIOR#/PDIOW#/SDIOR#/SDIOW# Inactive From
CLK66 Rising
PDA[2:0]/SDA[2:0] Valid Delay From CLK66 Rising
PDCS1#/SDCS1#, PDCS3#/SDCS3# Active From
CLK66 Rising
PDCS1#/SDCS1#, PDCS3#/SDCS3# Inactive From
CLK66 Rising
PDDACK#/SDDACK# Active From CLK66 Rising
PDDACK#/SDDACK# Inactive From CLK66 Rising
PDDREQ/SDDREQ Setup Time to CLK66 Rising
PDDREQ/SDDREQ Hold From CLK66 Rising
PDD[15:0]/SDD[15:0] Valid Delay From CLK66 Rising
PDD[15:0]/SDD[15:0] Setup Time to CLK66 Rising
PDD[15:0]/SDD[15:0] Hold From CLK66 Rising
PIORDY/SIORDY Setup Time to CLK66 Rising
PIORDY/SIORDY Hold From CLK66 Rising
PIORDY/SIORDY Inactive Pulse Width
PDIOR#/PDIOW#/SDIOR#/SDIOW# Pulse Width Low
PDIOR#/PDIOW#/SDIOR#/SDIOW# Pulse Width
High
Parameter
–
4 PCI clocks when the drive mode is Mode 2 or
Min
10
48
2
2
2
2
2
2
2
7
7
2
7
7
7
Max
20
20
30
30
30
20
20
30
Electrical Characteristics
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2,3
3,4
Notes
9
10
9
10
9
9
9
10
10
10
9
10
9
10
9
10
9
9
9
9
10
9
10
Figure
–
5 PCI
609
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