FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 322
FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
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LPC Interface Bridge Registers (D31:F0)
9.1.9
9.1.10
322
HEADTYP—Header Type Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
PMBASE—ACPI Base Address Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
Sets base address for ACPI I/O registers, GPIO registers and TCO I/O registers. These registers
can be mapped anywhere in the 64-K I/O space on 128-byte boundaries.
31:16
Bit
6:0
15:7
7
Bit
6:1
0
Multi-Function Device — RO. This bit is 1 to indicate a multi-function device.
Header Type — RO. This 7-bit field identifies the header layout of the configuration space.
Reserved
Base Address — R/W. This field provides 128 bytes of I/O space for ACPI, GPIO, and TCO logic.
This is placed on a 128-byte boundary.
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate I/O space.
0Eh
80h
40
00000001h
No
–
43h
Intel
Description
Description
Attribute:
Size:
Attribute:
Size:
Usage:
Power Well:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RO
8 bits
R/W, RO
32 bit
ACPI, Legacy
Core
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