FW82801ER S L742 Intel, FW82801ER S L742 Datasheet - Page 534
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FW82801ER S L742
Manufacturer Part Number
FW82801ER S L742
Description
Manufacturer
Intel
Datasheet
1.FW82801ER_S_L742.pdf
(671 pages)
Specifications of FW82801ER S L742
Lead Free Status / RoHS Status
Not Compliant
- Current page: 534 of 671
- Download datasheet (8Mb)
AC ’97 Audio Controller Registers (D31:F5)
15.1.1
15.1.2
534
Core well registers not reset by the D3
Resume well registers will not be reset by the D3
VID—Vendor Identification Register
(Audio—D31:F5)
Offset:
Default Value:
Lockable:
DID—Device Identification Register
(Audio—D31:F5)
Offset:
Default Value:
Lockable:
•
•
•
•
•
•
•
15:0
15:0
Bit
Bit
offset 2Ch
offset 2Eh
offset 40h – Programmable Codec ID (PCID)
offset 41h – Configuration (CFG)
offset 54h
Bus Mastering Register: Global Status Register, bits 17:16
Bus Mastering Register: SDATA_IN MAP register, bits 7:3
Vendor ID. This is a 16-bit value assigned to Intel.
Device ID.
–
–
–
55h – Power Management Control and Status (PCS)
2Fh – Subsystem ID (SID)
2Dh – Subsystem Vendor ID (SVID)
00
8086h
No
02
24D5h
No
–
–
01h
03h
HOT
to D0 transition:
Description
Description
Intel
HOT
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
®
to D0 transition:
82801EB ICH5 / 82801ER ICH5R Datasheet
RO
16 Bits
Core
RO
16 Bits
Core
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