ISP1181BDGG,112 STEricsson, ISP1181BDGG,112 Datasheet - Page 15

• Manufacturer Part Number: ISP1181BDGG,112
• Manufacturer: STEricsson

Specifications of ISP1181BDGG,112

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Package Type: TSSOP
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Supplier Unconfirmed

ISP1181B_3
Product data sheet
9.3 Endpoint initialization
9.4 Endpoint I/O mode access
9.5 Special actions on control endpoints
In response to the standard USB request, Set Interface, the firmware must program all
16 ECRs of the ISP1181B in sequence (see
or not. The hardware will then automatically allocate FIFO storage space.
If all endpoints have been configured successfully, the firmware must return an empty
packet to the control IN endpoint to acknowledge success to the host. If there are errors in
the endpoint configuration, the firmware must stall the control IN endpoint.
When reset by hardware or via the USB bus, the ISP1181B disables all endpoints and
clears all ECRs, except for the control endpoint which is fixed and always enabled.
Endpoint initialization can be done at any time; however, it is valid only after enumeration.
When an endpoint event occurs (a packet is transmitted or received), the associated
endpoint interrupt bits (EPn) of the Interrupt Register (IR) will be set by the SIE. The
firmware then responds to the interrupt and selects the endpoint for processing.
The endpoint interrupt bit will be cleared by reading the Endpoint Status Register (ESR).
The ESR also contains information on the status of the endpoint buffer.
For an OUT (= receive) endpoint, the packet length and packet data can be read from
ISP1181B using the Read Buffer command. When the whole packet has been read, the
firmware sends a Clear Buffer command to enable the reception of new packets.
For an IN (= transmit) endpoint, the packet length and data to be sent can be written to
ISP1181B using the Write Buffer command. When the whole packet has been written to
the buffer, the firmware sends a Validate Buffer command to enable data transmission to
the host.
Control endpoints require special firmware actions. The arrival of a SETUP packet flushes
the IN buffer and disables the Validate Buffer and Clear Buffer commands for the control
IN and OUT endpoints. The microcontroller needs to re-enable these commands by
sending an Acknowledge Setup command to both control endpoints.
This ensures that the last SETUP packet stays in the buffer and that no packets can be
sent back to the host until the microcontroller has explicitly acknowledged that it has seen
the SETUP packet.
Rev. 03 — 23 January 2009
Table
Full-speed USB peripheral controller
4), whether the endpoints are enabled
© ST-NXP Wireless 2009. All rights reserved.
ISP1181B
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