ISP1181BDGG,112 STEricsson, ISP1181BDGG,112 Datasheet - Page 24

• Manufacturer Part Number: ISP1181BDGG,112
• Manufacturer: STEricsson

Specifications of ISP1181BDGG,112

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Package Type: TSSOP
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Supplier Unconfirmed

12. Commands and registers
Table 13.
ISP1181B_3
Product data sheet
Name
Initialization commands
Write Control OUT Configuration
Write Control IN Configuration
Write Endpoint n Configuration
(n = 1 to 14)
Read Control OUT Configuration
Read Control IN Configuration
Command and register summary
Table 12.
The functions and registers of ISP1181B are accessed via commands, which consist of a
command code followed by optional data bytes (read or write action). An overview of the
available commands and registers is given in
A complete access consists of two phases:
The following applies for register or FIFO access in 16-bit bus mode:
Register
Mode
Hardware
Configuration
Unlock
1. Command phase: when address bit A0 = 1, the ISP1181B interprets the data on the
2. Data phase (optional): when address bit A0 = 0, the ISP1181B transfers the data on
•
•
•
lower byte of the bus bits D[7:0] as a command code. Commands without a data
phase are executed immediately.
the bus to or from a register or endpoint FIFO. Multi-byte registers are accessed least
significant byte/word first.
The upper byte (bits D15 to D8) in command phase or the undefined byte in data
phase are ignored.
The access of registers is word-aligned: byte access is not allowed.
If the packet length is odd, the upper byte of the last word in an IN endpoint buffer is
not transmitted to the host. When reading from an OUT endpoint buffer, the upper
byte of the last word must be ignored by the firmware. The packet length is stored in
the first 2 bytes of the endpoint buffer.
Summary of control bits
Destination
Endpoint Configuration Register
endpoint 0 OUT
Endpoint Configuration Register
endpoint 0 IN
Endpoint Configuration Register
endpoint 1 to 14
Endpoint Configuration Register
endpoint 0 OUT
Endpoint Configuration Register
endpoint 0 IN
Bit
SOFTCT
GOSUSP
EXTPUL
WKUPCS
PWROFF
all
Rev. 03 — 23 January 2009
Function
enables SoftConnect pull-up resistor to USB bus
a HIGH-to-LOW transition enables the suspend state
selects internal (SoftConnect) or external pull-up resistor
enables wake-up on LOW level of input CS
selects powered-off mode during the suspend state
sending data AA37H unlocks the internal registers for writing
after a resume
…continued
Table
Code (Hex)
20
21
22 to 2F
30
31
Full-speed USB peripheral controller
13.
Transaction
write 1 byte
write 1 byte
write 1 byte
read 1 byte
read 1 byte
© ST-NXP Wireless 2009. All rights reserved.
ISP1181B
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