ISP1181BDGG,112 STEricsson, ISP1181BDGG,112 Datasheet - Page 7

• Manufacturer Part Number: ISP1181BDGG,112
• Manufacturer: STEricsson

Specifications of ISP1181BDGG,112

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Package Type: TSSOP
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Supplier Unconfirmed

ISP1181B_3
Product data sheet
Table 2.
Symbol
EOT
DREQ
DACK
TEST1
TEST2
INT
TEST3
BUS_CONF0
BUS_CONF1
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
GND
V
DATA9
DATA8
DATA7
DATA6
ref
[1]
Pin description
Pin
TSSOP48
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Rev. 03 — 23 January 2009
…continued
HVQFN48
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Type
I
O
I
I
I
O
O
I
I
I/O
I/O
I/O
I/O
I/O
I/O
-
-
I/O
I/O
I/O
I/O
Description
End-Of-Transfer input (programmable polarity,
see
force the end of a DMA transfer to the
ISP1181B
DMA request output (4 mA; programmable
polarity, see
controller that the ISP1181B wants to start a
DMA transfer
DMA acknowledge input (programmable
polarity, see
controller to signal the start of a DMA transfer
requested by the ISP1181B
test input; this pin must be connected to V
via an external 10 k resistor
test input; this pin must be connected to V
via an external 10 k resistor
interrupt output; programmable polarity (active
HIGH or LOW) and signalling (level or pulse);
see
test output; this pin is used for test purposes
only
bus configuration selector; see
bus configuration selector; see
bit 15 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 14 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 13 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 12 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 11 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 10 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
ground supply
I/O pin reference voltage (3.3 V); no
connection if V
bit 9 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 8 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 7 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 6 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
Full-speed USB peripheral controller
Table
Table 21
21); used by the DMA controller to
Table
Table
CC
= 5.0 V
21); signals to the DMA
21); used by the DMA
© ST-NXP Wireless 2009. All rights reserved.
ISP1181B
Table 3
Table 3
6 of 72
CC
CC