MC9S08GT32ACFDE Freescale, MC9S08GT32ACFDE Datasheet - Page 191

• Manufacturer Part Number: MC9S08GT32ACFDE
• Manufacturer: Freescale

Specifications of MC9S08GT32ACFDE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: QFN EP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

12.1.1
Features of the SPI module include:
12.1.2
This section includes block diagrams showing SPI system connections, the internal organization of the SPI
module, and the SPI clock dividers that control the master mode bit rate.
12.1.2.1
Figure 12-2
device initiates all SPI data transfers. During a transfer, the master shifts data out (on the MOSI pin) to the
slave while simultaneously shifting data in (on the MISO pin) from the slave. The transfer effectively
exchanges the data that was in the SPI shift registers of the two SPI systems. The SPSCK signal is a clock
output from the master and an input to the slave. The slave device must be selected by a low level on the
slave select input (SS pin). In this system, the master device has configured its SS pin as an optional slave
select output.
Freescale Semiconductor
•
•
•
•
•
•
•
Master or slave mode operation
Full-duplex or single-wire bidirectional option
Programmable transmit bit rate
Double-buffered transmit and receive
Serial clock phase and polarity options
Slave select output
Selectable MSB-first or LSB-first shifting
7
6
Features
Block Diagrams
shows the SPI modules of two MCUs connected in a master-slave arrangement. The master
SPI System Block Diagram
5
GENERATOR
SPI SHIFTER
MASTER
CLOCK
4
3
2
1
0
Figure 12-2. SPI System Connections
MC9S08GB60A Data Sheet, Rev. 2
MOSI
MISO
SPSCK
SS
SPSCK
MOSI
MISO
SS
7
SLAVE
6
5
SPI SHIFTER
4
Serial Peripheral Interface (S08SPIV3)
3
2
1
0
191