MC9S08GT32ACFDE Freescale, MC9S08GT32ACFDE Datasheet - Page 51

• Manufacturer Part Number: MC9S08GT32ACFDE
• Manufacturer: Freescale

Specifications of MC9S08GT32ACFDE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: QFN EP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

to program the entire array through the single-wire background debug interface. Because no special
voltages are needed for flash erase and programming operations, in-application programming is also
possible through other software-controlled communication paths. For a more detailed discussion of
in-circuit and in-application programming, refer to the HCS08 Family Reference Manual, Volume I,
Freescale Semiconductor document order number HCS08RMv1/D.
4.4.1
Features of the flash memory include:
4.4.2
Before any program or erase command can be accepted, the flash clock divider register (FCDIV) must be
written to set the internal clock for the flash module to a frequency (f
(see
initialization. FCDIV cannot be written if the access error flag, FACCERR in FSTAT, is set. The user must
ensure that FACCERR is not set before writing to the FCDIV register. One period of the resulting clock
(1/f
timing pulses is used by the command processor to complete a program or erase command.
Table 4-5
of FCLK (f
of cycles of FCLK and as an absolute time for the case where t
shown include overhead for the command state machine and enabling and disabling of program and erase
voltages.
Freescale Semiconductor
FCLK
•
•
•
•
•
•
•
Table
Flash Size
— MC9S08GB60A/MC9S08GT60A — 61268 bytes (120 pages of 512 bytes each)
— MC9S08GB32A/MC9S08GT32A— 32768 bytes (64 pages of 512 bytes each)
Single power supply program and erase
Command interface for fast program and erase operation
Up to 100,000 program/erase cycles at typical voltage and temperature
Flexible block protection
Security feature for flash and RAM
Auto power-down for low-frequency read accesses
) is used by the command processor to time program and erase pulses. An integer number of these
shows program and erase times. The bus clock frequency and FCDIV determine the frequency
4.6.1). This register can be written only once, so normally this write is done during reset
Features
Program and Erase Times
FCLK
1
Byte program
Byte program (burst)
Page erase
Mass erase
Excluding start/end overhead
). The time for one cycle of FCLK is t
Parameter
Table 4-5. Program and Erase Times
MC9S08GB60A Data Sheet, Rev. 2
Cycles of FCLK
20,000
4000
9
4
FCLK
= 1/f
FCLK
FCLK
FCLK
Time if FCLK = 200 kHz
= 5 μs. Program and erase times
. The times are shown as a number
) between 150 kHz and 200 kHz
100 ms
20 μs
20 ms
45 μs
1
Chapter 4 Memory
51