CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 414
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CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
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Part Number:
CS5535-UDCF
Manufacturer:
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6.12.10.3 CEIR Configuration Register (RCCFG)
I/O Offset
Type
Reset Value
RCCFG controls the basic operation of the CEIR mode.
414
Bit
1:0
R_LEN
7
6
5
4
3
2
7
Name
R_LEN
T_OV
RXHSC
RCDM_DS
RSVD
TXHSC
RC_MMD[1:0]
02h
R/W
00h
T_OV
6
31506B
Description
Run Length Control. When set to 1, this bit enables run length encoding/decoding. The
format of a run length code is:
Yxxxxxxx, where Y is the bit value and xxxxxxx is the number of bits minus 1 (selects
from 1 to 128 bits).
Receiver Sampling Mode.
0: Programmed T period sampling.
1: Oversampling mode.
Receiver Carrier Frequency Select. This bit selects the receiver demodulator fre-
quency range.
0: Low frequency: 30.0-56.9 kHz.
1: High frequency: 400-480 kHz.
Receiver Demodulation Disable. When this bit is 1, the internal demodulator is dis-
abled. The internal demodulator, when enabled, performs carrier frequency checking and
envelope generation. This bit must be set to 1 (disabled) when the demodulation is per-
formed externally, or when oversampling mode is selected to determine the carrier fre-
quency.
Reserved. Write as 0.
Transmitter Subcarrier Frequency Select. This bit selects the modulation carrier fre-
quency range.
0: Low frequency: 30.0-56.9 kHz.
1: High frequency: 400-480 kHz.
Transmitter Modulator Mode. Determines how IR pulses are generated from the trans-
mitted bit string.
00: C_PLS modulation mode. Pulses are generated continuously for the entire logic 0 bit
01: 8_PLS modulation mode. 8 pulses are generated each time one or more logic 0 bits
10: 6_PLS Modulation Mode. 6 pulses are generated each time one or more logic 0 bits
11: Reserved. Result is indeterminate.
RXHSC
time.
are transmitted following a logic 1 bit.
are transmitted following a logic 1 bit.
5
RCCFG Bit Descriptions
RCCFG Register Map
RCDM_DS
4
RSVD
3
AMD Geode™ CS5535 Companion Device Data Book
TXHSC
2
UART and IR Port Register Descriptions
1
RC_MMD[1:0]
0
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