CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 90
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CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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5.3.1
The ACC includes eight bus mastering units (three for
input, five for output). Each bus master corresponds to one
or two slots in the AC Link transfer protocol (see Section
5.3.4.1 "AC Link Serial Interface Protocol" on page 91).
Table 5-4 lists the details for each bus master.
5.3.2
The bus masters must be programmed by software to con-
figure how they transfer data. This is done using their con-
figuration registers. These registers determine whether the
bus master is active and what parts of memory they have
been assigned to transfer. Status registers allow software
to read back information on the state of the bus masters.
(See Section 6.3.2 "ACC Native Registers" on page 252 for
further details on the Bus Master Audio Configuration reg-
isters.)
90
Bus
Master
BM0
BM1
BM2
BM3
BM4
BM5
BM6
BM7
Audio Bus Masters
Bus Master Audio Configuration
Registers
Size
32-bit
(16 bits/channel)
32-bit
(16 bits/channel)
16-bit
16-bit
16-bit
16-bit
32-bit
(16 bits/channel)
16-bit
31506B
Direction
Output to codec
Input from codec
Output to codec
Input from codec
Output to codec
Input from codec
Output to codec
Output to codec
Table 5-4. Audio Bus Master Descriptions
AC Link Slot(s)
3 (left) and 4 (right)
3 (left) and 4 (right)
5
5
6 or 11 (configurable)
7 (left) and 8 (right)
9
6 or 11 (configurable)
5.3.3
The AC Link is the interface between the AC97 codec and
the ACC. The interface is AC97 v2.1 compliant. Any AC97
codec that supports Sample Rate Conversion (SRC) can
be used with the ACC. See Intel Corporation’s “Audio
Codec 97” Revision 2.1 component specification for more
details.
The AC Link protocol defines an input and output frame
consisting of 12 “slots” of data. Each slot contains 20 bits,
except slot 0, it contains 16 bits. The SYNC signal is gener-
ated by the ACC and defines the beginning of an input and
an output frame. The serial clock is generated by the AC97
codec. The AC Link is covered in depth in Section 5.3.4.1
"AC Link Serial Interface Protocol" on page 91. It is impor-
tant to note that the AC97 codec has its own set of configu-
ration registers that are separate from the ACC. These
registers are accessible over the serial link. There are reg-
isters in the ACC that provide software with an interface to
the AC97 codec registers. (See Section 6.3.2 "ACC Native
Registers" on page 252 for register descriptions.)
AMD Geode™ CS5535 Companion Device Data Book
AC Link Overview
Channel Description
Left and Right Stereo Main Playback
Left and Right Stereo Recording
Modem Line 1 DAC Output
Modem Line 1 ADC Input
Center Channel Playback (slot 6) or
Headset Playback (slot 11)
Microphone Record (slot 6) or
Headset Record (slot 11)
Left and Right Surround Playback
Low Frequency Effects Playback (LFE)
AC97 Audio Codec Controller
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