CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 95
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CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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AC97 Audio Codec Controller
5.3.7
5.3.7.1
Before a bus master starts a transfer it must be pro-
grammed with a pointer to a Physical Region Descriptor
(PRD) table. This is done by writing to the bus master’s
PRD Table Address register. This pointer sets the starting
memory location of the PRD table. The PRDs in the PRD
table describe the areas of memory that are used in the
data transfer. The table must be aligned on a 4-byte
boundary (DWORD aligned).
5.3.7.2
Each physical memory region to be transferred is
described by a PRD as illustrated in Table 5-6. The PRD
table must be created in memory by software before the
bus master can be activated. When the bus master is
enabled by setting its Bus Master Enable bit, data transfer
begins, with the PRD table serving as the bus master’s
“guide” for what to do. The bus master does not cache
PRDs.
A PRD entry in the PRD table consists of two DWORDs.
The first DWORD contains a 32-bit pointer to a buffer to be
transferred (Memory Region Base Address). The second
DWORD contains control flags and a 16-bit buffer size
value. The maximum amount of audio data that can be
transferred for a given PRD is 65534 bytes for mono
streams and 65532 bytes for stereo streams.
For stereo streams (bus masters 0, 1, and 6):
AMD Geode™ CS5535 Companion Device Data Book
DWORD
Memory Region Base Address and Size should be a
multiple of four (DWORD aligned). This ensures an
equal number of left and right samples.
0
1
ACC Software Programming
Physical Region Descriptor (PRD) Table
Address Register
Physical Region Descriptor Format
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
O
E
T
O
E
P
M
P
J
Byte 3
Table 5-6. Physical Region Descriptor (PRD) Format
Memory Region Base Address [31:0] (Address of Audio Data Buffer)
Reserved
Byte 2
For mono streams (bus masters 2, 3, 4, 5, and 7):
Descriptions of the control flags are:
• End of Transfer (EOT) - If set in a PRD, this bit indi-
• End of Page (EOP) - If set in a PRD and the bus master
• Jump (JMP) - This PRD is special. If set, the Memory
cates the last entry in the PRD table. The last entry in a
PRD table must have either the EOT bit or the JMP bit
set. A PRD can not have both the JMP and EOT bits set.
When the bus master reaches an EOT, it stops and
clears its Bus Master Enable bit. If software desires an
IRQ to be generated with the EOT, it must set the EOP
bit and the EOT bit on the last PRD entry.
has completed the PRD’s transfer, the End of Page bit is
set (in the IRQ status register) and an IRQ is generated.
If a second EOP is reached due to the completion of
another PRD before the End of Page bit is cleared, the
Bus Master Error bit is set (in the IRQ status register)
and the bus master pauses. In this paused condition,
reading the IRQ status register clears both the Bus
Master Error and the End of Page bits, and the bus
master continues.
Region Base Address is now the target address of the
JMP. The target address of the JMP must point to
another PRD. There is no audio data transfer with this
PRD. This PRD allows the creation of a looping mecha-
nism. If a PRD table is created with the JMP bit set in the
last PRD, the PRD table does not need a PRD with the
EOT bit set. A PRD can not have both the JMP and EOT
bits set.
Memory Region Base Address and Size should be a
multiple of two (WORD aligned).
Byte 1
Size [15:0]
31506B
8
7
6
5
Byte 0
4
3
2
1
0
95
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