CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 557
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CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
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Part Number:
CS5535-UDCF
Manufacturer:
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Electrical Specifications
Note 1. Per the ATA/ATAPI-5 spec, these signals utilize Output Reference Timing (see Figure 7-3 on page 551) relative to
Note 2. t
Note 3. This signal uses Output Reference Timing (see Figure 7-3 on page 551). Figure 7-6 illustrates IDE_HDMA_DS and
Note 4. Per the ATA/ATAPI-5 spec, these signals utilize Input Reference Timing (see Figure 7-4 on page 551) relative to
Note 5. For IDE_IRQ0, GPIO2 configured: IN_AUX1 and Input Enable = 1; Output Enable, OUT_AUX1, and OUT_AUX2
AMD Geode™ CS5535 Companion Device Data Book
Signal
IDE_DACK0#
IDE_HDMA_DS,
IDE_STOP,
IDE_IOW0#
IDE_DATA[15:0]
IDE_DREQ0
IDE_DDMA_RDY
IDE_IRQ0
IDE_HDMA_DS
IDE_DATA[15:0]
IDE_IOR0# and IDE_IOW0#. However, the IDE Controller uses the MHZ66_CLK edges to make output changes,
that when taken together, meet all the timing requirements of the referenced spec. Therefore, t
ified and tested relative to the MHZ66_CLK.
t
IDE_DATA[15:0] relationship.
IDE_IOR0#. However, the IDE Controller samples the inputs with the MHZ66_CLK at the appropriate points in time
to meet all the timing requirements of the referenced spec.
= 0.
VAL
VAL
t
min times with load of: 15 pF cap to ground.
max times with load of: 40 pF cap to ground.
VAL_M
= 6 ns
Table 7-11. IDE UltraDMA Data Out Timing Parameters
Parameter
t
t
Async Input
Async Input
Async Input
VAL
VAL
Figure 7-6. IDE UltraDMA Data Out Timing
t
VAL_P
= 6 ns
Min
NA
NA
NA
2
See Notes
Max
NA
NA
NA
10
Units
ns
ns
ns
ns
ns
Comment/Condition
In Ultra DMA/33 mode, the
IDE_IOR0# signal is redefined as
IDE_HDMA_DS.
Note 1 and Note 2.
Note 2 and Note 3.
No clock reference. Note 4.
In Ultra DMA/33 mode, the
IDE_RDY0 signal is redefined as
IDE_DDMA_RDY.
Note 4.
Note 4 and Note 5.
31506B
VAL
times are spec-
557
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