LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 111
LSI53C040-160QFP
Manufacturer Part Number
LSI53C040-160QFP
Description
Manufacturer
LSI
Datasheet
1.LSI53C040-160QFP.pdf
(212 pages)
Specifications of LSI53C040-160QFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
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Chapter 7
Miscellaneous
Registers
This chapter contains descriptions of the LSI53C040 Miscellaneous
registers. The SCSI/DMA registers, SFF-8067 registers, Two-Wire Serial
registers, and System registers are described in
Chapter
programmed to a binary one, while the terms “reset” or “clear” are used
to refer to bits that are programmed to binary zero. Any bits marked as
reserved should always be written to zero; mask all information read from
them. Reserved bit functions may be changed at any time. Unless
otherwise indicated, all bits in registers are active high, that is, the feature
is enabled by setting the bit. The bottom row of every register diagram
shows the default bit values, which are enabled after the chip is powered
on or reset.
Figure 7.1
Figure 7.1
LSI53C040 Enclosure Services Processor Technical Manual
0xFCFF
0xFDFF
0xFC1F
0xFEFF
0xFC00
0xFC20
0xFD00
0xFFFF
0xFE00
0xFF00
7, and
summarizes the entire LSI53C040 register set.
Two-Wire Serial Interface Registers
Register Set Overview
SCSI Core and DMA Registers
Chapter
Miscellaneous Registers
SFF-8067 Registers
System Registers
8. The term “set” is used to refer to bits that are
Chapter 4
through
7-1
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