TS8388BMFS9NB1 E2V, TS8388BMFS9NB1 Datasheet - Page 10

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TS8388BMFS9NB1

Manufacturer Part Number
TS8388BMFS9NB1
Description
Manufacturer
E2V
Datasheet

Specifications of TS8388BMFS9NB1

Lead Free Status / RoHS Status
Supplier Unconfirmed
0973D–BDC–02/09
Layout Information
2.4
2.5
2-2
e2v semiconductors SAS 2009
Power Supplies
TS8388B On-
board
Implementation
The bottom metal layer 7 is dedicated to the power supply traces (V
V
The supply traces are approximately 6 mm wide in order to present low impedance, and
are surrounded by a ground plane connected to the two inner ground planes.
The Analog and Digital negative power supply traces are independent, but the possibil-
ity exists to short-circuit both supplies on the top metal layer.
No difference in ADC high speed performance is observed when connecting both nega-
tive supply planes together. Obviously one single negative supply plane could be used
for the circuit.
Each power supply incoming is bypassed by a 1 µF Tantalum capacitor in parallel with
1 nF chip capacitor.
Each power supply access is decoupled very close to the device by a 10 nF and 100 pF
surface mount chip capacitors in parallel.
Note:
Surface-mount resistors and chip capacitors allow the closest possible connections to
the device pins, for microstrip line back termination and bypassing.
DD
Connecting the positive supply pads:
Connecting the negative supply pads:
Ground pads connections:
, V
– The positive supply pads denoted V
– The positive digital supply pads are denoted V
– The TS8388BGL has separate analog and digital –5V supplies:
– The V
– The analog ground pads are denoted GND.
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The corresponding V
Each V
by a 1 nF chip capacitor.
The V
The corresponding V
Each V
chip capacitor.
The V
evaluation board.
The negative analog supply pads are denoted V
The V
The negative digital supply pad is denoted DV
The DV
The DV
Each V
near the device by a 1 nF chip capacitor.
layer 7 V
The corresponding GND pad numbers are 20, 26, 28, 33, 35, 37.
The decoupling capacitors are superposed. In this configuration, the 100 pF capacitors
must be mounted first.
).
CC
EE
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EE
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CC
EE
EE
EE
corresponding pad numbers are 22, 29, 31.
EE
supply pads are connected to the back side V
and DV
corresponding pad number is pad 6.
supply pad is dedicated to the digital output buffers only.
power supply pad is decoupled as closely to the device as possible
and DV
and V
supply pads are connected to the back side V
power supply pad is decoupled very close to the device by a 1 nF
EE
EED
EE
supply pads are respectively connected to the backside
CC
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supply planes.
power supply pad is decoupled as closely as possible
pad numbers are 19, 21, 23, 30, 39, 40.
pad numbers are 1, 11.
CC
:
TSEV8388B - Evaluation Board User Guide
EE
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EE
.
.
(0V or 2.4V).
CC
plane of the CEB.
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EEA
, V
plane of the
EED
, V
EET
, V
CC
,