TS8388BMFS9NB1 E2V, TS8388BMFS9NB1 Datasheet - Page 19

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TS8388BMFS9NB1

Manufacturer Part Number
TS8388BMFS9NB1
Description
Manufacturer
E2V
Datasheet

Specifications of TS8388BMFS9NB1

Lead Free Status / RoHS Status
Supplier Unconfirmed
4.9
TSEV8388B - Evaluation Board User Guide
Test Bench
Description
Figure 4-4. Differential Analog and Clock Inputs Configuration
Note:
Figure 4-5. Single-ended Analog and Clock Input Configuration
Note:
The TS81102G0 DMUX device can be used at the ADC output in order to slow down the
ADC output data rate by a factor of 4 or 8.
The TS81102G0 DMUX device can be used at the ADC output in order to slow down the
ADC output data rate by a factor of 4 or 8.
- 121 dBc/Hz at 1 KHz
offset from fc
- 117 dBc/Hz at 2 KHz
offset from fc
GPIB
GPIB
Data Acquisition
Data Acquisition
RF Generator
RF Generator
RF Generator
RF Generator
System
System
PC
PC
0 − 180°
10 dBm (typ)
8 Data
Hybrid
8 Data
BPF
BPF
(open) CLKB
Tunable delay line
Tunable delay line
DR
DR
CLKB
TS8388B
TS8388B
ADC
ADC
CLK (4 dBm)
0 − 180°
Hybrid
CLK
Application Information
-8 dBm
-8 dBm
VINB
VIN
-2 dBm
0973D–BDC–02/09
(open)
VINB
VIN
4-5