TS8388BMFS9NB1 E2V, TS8388BMFS9NB1 Datasheet - Page 12

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TS8388BMFS9NB1

Manufacturer Part Number
TS8388BMFS9NB1
Description
Manufacturer
E2V
Datasheet

Specifications of TS8388BMFS9NB1

Lead Free Status / RoHS Status
Supplier Unconfirmed
0973D–BDC–02/09
Operating Procedures and Characteristics
3.3
Table 3-1. Absolute Maximum Ratings
Notes:
3-2
e2v semiconductors SAS 2009
Parameter
Positive supply voltage
Digital negative supply voltage
Digital positive supply voltage
Negative supply voltage
Maximum difference between negative supply voltages
Analog input voltages
Maximum difference between V
Clock input voltage
Maximum difference between V
Static input voltage
Digital input voltage
Digital output voltage
Maximum junction temperature
Storage temperature
Lead temperature (soldering 10s)
1. Absolute maximum ratings are limiting values (referenced to GND = 0V), to be applied individually, while other parameters
2. In case only one supply is used for supplying the
Electrical
Characteristics
are within specified operating conditions. Long exposure to maximum rating may affect device reliability. The use of a ther-
mal heat sink is mandatory.
IN
CLK
and V
and V
4. Connect the analog signal V
5. Connect the high speed data acquisition system probes to the output connector.
6. Board functionality verification and proposed product evaluation procedure:
7. The devices operate respectively from 10 Msps up to 1.4 Gsps in binary output
INB
CLKB
open (as on-board 50Ω terminated). Use a low phase noise RF source. Full
Scale range is 0.5V peak to peak around 0V, (±250 mV), or –2 dBm into 50Ω.
Input frequency can range from DC up to 1.8 GHz. At 1.8 GHz, the ADC attenu-
ates by –3 dB the input signal.
The connector pitch (2.54 mm) is compatible with High Speed Digital Acquisition
System probes. The digital data are on-board differentially terminated. However,
the output data can be picked up either in single-ended or differentially mode.
– A first test can be run at 500 Msps/250 MHz Nyquist: about 7.4 Effective Bits
– At 1 Gsps/500 MHz: about 7.0 Effective Bits (typ) should be obtained.
– At 1 Gsps/1 GHz and –1 dB Full Scale analog input, 6.4 bits and -43 dBc
format and 10 Msps up to 2 Gsps in Gray output format. It is capable of sampling
analog input waveforms ranging from DC up to 1.5 GHz.
(typ) should be obtained.
SFDR should be obtained. In the same conditions for –3 dB Full Scale input,
6.8 bits and –48 dBc are obtained.
Symbol
V
DV
V
V
DV
V
V
V
V
V
V
V
Tj
T
T
O
stg
leads
CC
PLUSD
EE
IN
IN
CLK
CLK
D
D
EE
EE
5V negative power planes, apply the V
(2)
or V
- V
(2)
or V
- V
to V
INB
INB
CLKB
CLKB
EE
IN
. The inverted phase clock input V
Comments
GORB
DRRB
TSEV8388B - Evaluation Board User Guide
V
PLUSD
GND
V
EED
0.3 to V
EE
GND to
GND to
GND to 6
65 to +150
absolute maximum ratings.
3 to +1.5
3 to V
Value
1 to +1
2 to +2
2 to +2
0.3 to +0.9
+145
+300
0.3
0.3 to 2.8
CC
PLUSD
5.7
+0.3
6
INB
may be left
0.5
Unit
°C
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V