SI5317C-C-GMR Silicon Laboratories Inc, SI5317C-C-GMR Datasheet - Page 37

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SI5317C-C-GMR

Manufacturer Part Number
SI5317C-C-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI5317C-C-GMR

Lead Free Status / RoHS Status
Supplier Unconfirmed
9. Pin Descriptions: Si5317
Note: Pin assignments are preliminary and subject to change.
5, 10, 32
Pin #
1
2
3
Pin Name
FRQTBL
RST
LOS
V
DD
V
I/O
O
DD
I
I
FRQTBL
Table 15. Si5317 Pin Descriptions
GND
VDD
RST
LOS
Signal Level
NC
NC
XA
XB
LVCMOS
LVCMOS
3-level
Supply
1
2
3
4
5
6
7
8
9
36
10 11 12 13 14 15 16 17
35
34
33
External Reset.
Active low input that performs external hardware reset of
device. Resets all internal logic to a known state. Clock out-
puts are tristated during reset. After rising edge of RST sig-
nal, the Si5317 will perform an internal self-calibration when
a valid input signal is present.
This pin has a weak pull-up.
Frequency Table.
Selects frequency table.
This pin has a weak pull-up and weak pull-down and defaults
to M. Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
CKIN Loss of Signal.
Active high loss-of-signal indicator for CKIN. Once triggered,
the alarm will remain active until CKIN is validated.
0 = CKIN present
1 = LOS on CKIN
Supply.
The device operates from a 1.8, 2.5, or 3.3 V supply. Bypass
capacitors should be associated with the following V
5
10
32
A 1.0 µF should also be placed as close to device as is
practical.
GND
Pad
Rev. 1.0
32
31
30
29
28
18
27
26
25
24
23
22
21
20
19
0.1 µF
0.1 µF
0.1 µF
FRQSEL3
FRQSEL2
FRQSEL1
FRQSEL0
BWSEL1
BWSEL0
NC
INC
DEC
Description
Si5317
DD
pins:
37

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