BBT3821-JH Intersil, BBT3821-JH Datasheet - Page 61

• Manufacturer Part Number: BBT3821-JH
• Description: IC RE-TIMER OCTAL 192-BGA
• Manufacturer: Intersil
• Type: Clock and Data Recovery (CDR)r

Specifications of BBT3821-JH

• Input: Differential
• Output: CML
• Frequency - Max: 3.1875GHz
• Voltage - Supply: 1.425 V ~ 1.575 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 192-EBGA
• Frequency-max: 3.1875GHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DC Characteristics
Note (1): Measured at TP3 as defined in the IEEE 802.3ak-2004 specifications. This value is needed in each IPG to maintain the SIG_DET function active. The
Note (2): Measured at TP2 as defined in the IEEE 802.3ak-2004 specifications.
Note (3): CX4 Mode not specified for low power Vdd = 1.35V operation; “Standard Device” conditions are required.
Note (1): BBT3821LP-JH only.
Note (1): Measured using CJPAT.
V
Note (1): XENPAK MSA recommended for LASI pin.
Note (2): For MDIO and LASI pins.
Note (3): Only for RSTN and MDC pins.
PULL
∆V
SYMBOL
V
V
V
SYMBOL
SYMBOL
SYMBOL
R
V
P-POUT2
P-POUT2
P-POUT2
V
V
V
V
V
V
V
V
P-POUT2
= External pullup Voltage, not to exceed V
Pullup
HYST
V
V
V
V
V
I
I
P-PIN
P-PIN
P-PIN
OH
IH
CMO
CMO
CMO
OL
IL
BBT3821 will provide a BER < 1 in 10
IH
CMI
CMI
CMI
IL
External pullup resistor for open drain O/P
Output Low Voltage Level (IOL = 4mA)
Output High Voltage Level
Input Low Voltage Level
Input High Voltage Level
Hysteresis on Schmitt Trigger Inputs
Input Low Current, V
Input High Current, V
Peak-To-Peak Differential Voltage Input Requirement
Peak-To-Peak Differential Voltage Output
(Z
Standard Device Only
Difference between V
XAUI)
Output Common Mode Voltage
Internal Input Common Mode Voltage
Peak-To-Peak Differential Voltage Input Requirement
Peak-To-Peak Differential Voltage Output
(Z
Output Common Mode Voltage
Internal Input Common Mode Voltage
Peak-To-Peak Differential Voltage Input Requirement
Peak-To-Peak Differential Voltage Output
(Z
Output Common Mode Voltage
Internal Input Common Mode Voltage
O
O
O
= 100Ω differential load), definition as per IEEE 802.3ak-2004
= 100Ω differential load)
= 100Ω differential load), definition as per 802.3ae-2002
(2)
Table 108. EXTERNAL 1.2V CMOS OPEN DRAIN I/O ELECTRICAL SPECIFICATIONS
Table 107. PHY XS SERIAL PIN I/O ELECTRICAL SPECIFICATIONS, XAUI MODE
Table 105. PMA SERIAL PIN I/O ELECTRICAL SPECIFICATIONS, CX4 MODE
Table 106. PMA SERIAL PIN I/O ELECTRICAL SPECIFICATIONS, LX4 MODE
61
IN
IN
-12
P-POUT2
= 0.0V
= V
under the conditions of clause 54.6.4.1 of the specification.
PARAMETER
(1)
DD
DD
PARAMETER
PARAMETER
PARAMETER
from Lane to Lane on any group (CX4 or
(3)
(2)
(1)
BBT3821
(Standard)
(LowPower)
(1)
(1)
(2)
V
PULL
,
0.840
MIN
-0.2
100
-80
10
0
UNITS
-0.4
mV
mV
mV
MIN
MIN
100
800
100
800
V
V
TYP
120
150
.1
V
MIN
V
100
800
650
1000
1200
TYP
TYP
DD
DD
>60
>60
0.4
0.4
75
(3)
-.5
-.6
V
V
DD
0.360
V
MAX
200
PULL
1100
TYP
22
10
>60
DD
0.4
MAX
2000
1200
MAX
2000
1600
+0.2
150
-.5
UNITS
UNITS
MAX
2000
1600
UNITS
mV
mV
mV
mV
mV
mV
mV
kΩ
µA
µA
V
V
V
V
V
V
V