ISL12023IVZ Intersil, ISL12023IVZ Datasheet - Page 22

• Manufacturer Part Number: ISL12023IVZ
• Description: IC RTC/CLDR TEMP SNSR 14-TSSOP
• Manufacturer: Intersil
• Type: Clock/Calendarr

Specifications of ISL12023IVZ

• Memory Size: 1K (128 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ALPHA Hot Register (ALPHAH)
The ALPHA Hot variable is 7 bits and is defined as the
temperature coefficient of Crystal from the XT0 value to
+85°C (both Alpha Hot and Alpha Cold must be programmed
to provide full temperature compensation). It is normally
ADDR
2Dh
D
7
XT<4:0>
ALP_H6 ALP_H5 ALP_H4 ALP_H3 ALP_H2 ALP_H1 ALP_H0
01101
01100
01011
01010
01001
01000
00110
00101
00100
00011
00010
00001
00000
10000
10001
10010
10011
10100
10101
10110
11000
11001
11010
01111
01110
00111
10111
11011
11100
11101
11110
11111
6
TABLE 25. ALPHAH REGISTER
TABLE 24. XT0 VALUES
5
22
4
TURNOVER TEMPERATURE
3
32.5
32.0
31.5
30.5
29.5
29.0
28.5
28.0
27.5
27.0
26.5
26.0
25.5
25.0
25.0
24.5
24.0
23.5
23.0
22.5
22.0
21.5
21.0
20.5
20.0
19.5
19.0
18.5
18.0
17.5
2
31
30
1
ISL12023
0
given in units of ppm/°C
the ALPHA Cold version, a scaled version of the absolute
value of this coefficient is used in order to get an integer
value. Therefore, ALP_H<7:0> is defined as the (|Actual
Alpha Hot Value| x 2048) and converted to binary. For
example, a crystal with Alpha Hot of -0.034ppm/°C
scaled (|2048*(-0.034)| = 70d) and then converted to a
binary number of 01000110b.
The practical range of Actual ALPHAH values is from
-0.020 to -0.060.
The ISL12023 has a preset ALPHAH value corresponding to
the crystal in the module. This value is recalled on initial
power-up and should never be changed for best temperature
compensation performance, although the user may override
this preset value if so desired.
The ALPHAH register should only be changed while the TSE
(Temp Sense Enable) bit is “0”.
User Registers (Accessed by Using Slave
Address 1010111x)
Addresses [00h to 7Fh]
These registers are 128 bytes of battery-backed user SRAM.
The separate I
write to these registers.
I
The ISL12023 supports a bi-directional bus oriented
protocol. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as the
receiver. The device controlling the transfer is the master
and the device being controlled is the slave. The master
always initiates data transfers and provides the clock for
both transmit and receive operations. Therefore, the
ISL12023 operates as a slave device in all applications.
All communication over the I
sending the MSB of each byte of data first.
Protocol Conventions
Data states on the SDA line can change only during SCL LOW
periods. SDA state changes during SCL HIGH are reserved for
indicating START and STOP conditions (see Figure 14). On
power-up of the ISL12023, the SDA pin is in the input mode.
All I
condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH. The ISL12023 continuously monitors the SDA
and SCL lines for the START condition and does not respond
to any command until this condition is met (see Figure 14). A
START condition is ignored during the power-up sequence.
All I
condition, which is a LOW to HIGH transition of SDA while
SCL is HIGH (see Figure 14). A STOP condition at the end
2
C Serial Interface
2
2
C interface operations must begin with a START
C interface operations must be terminated by a STOP
2
C slave address must be used to read and
2
, with a typical value of -0.034. Like
2
C interface is conducted by
June 24, 2009
2
is first
FN6682.2