TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 110

• Manufacturer Part Number: TWR-K60N512-KEIL
• Description: K60N512 Keil Tower Kit
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr
• Type: MCUr

Specifications of TWR-K60N512-KEIL

• Rohs Compliant: YES
• Contents: 4 Boards, Documentation, DVD
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Freescale Tower System, K60N512

Configuration examples
#else
#endif /* ENHANCED_BD */
static void enet_init()
{
int usData;
const unsigned portCHAR ucMACAddress[6] =
{
configMAC_ADDR1,configMAC_ADDR2,configMAC_ADDR3,configMAC_ADDR4,configMAC_ADDR5
};
bus error*/
#if configUSE_MII_MODE
110
uint16_t length_proto_type;
uint16_t payload_checksum;
uint32_t bdu;
uint32_t timestamp;
uint32_t reserverd_word1;
uint32_t reserverd_word2;
} NBUF;
typedef struct
{
uint16_t status;
uint16_t length;
uint8_t
} NBUF;
configMAC_ADDR0,
/* Enable the ENET clock. */
SIM_SCGC2 |= SIM_SCGC2_ENET_MASK;
/*FSL: allow concurrent access to MPU controller. Example: ENET uDMA to SRAM, otherwise
MPU_CESR = 0;
prvInitialiseENETBuffers();
/* Set the Reset bit and clear the Enable bit */
ENET_ECR = ENET_ECR_RESET_MASK;
/* Wait at least 8 clock cycles */
for( usData = 0; usData < 10; usData++ )
{
asm( "NOP" );
}
/*FSL: start MII interface*/
mii_init(0, periph_clk_khz/1000/*MHz*/);
//enet_interrupt_routine
set_irq_priority (76, 6);
enable_irq(76);//ENET xmit interrupt
//enet_interrupt_routine
set_irq_priority (77, 6);
enable_irq(77);//ENET rx interrupt
//enet_interrupt_routine
set_irq_priority (78, 6);
enable_irq(78);//ENET error and misc interrupts
/*
PORTB_PCR0
PORTB_PCR1
PORTA_PCR14 = PORT_PCR_MUX(4);//RMII0_CRS_DV/MII0_RXDV
PORTA_PCR5
PORTA_PCR12 = PORT_PCR_MUX(4);//RMII0_RXD1/MII0_RXD1
PORTA_PCR13 = PORT_PCR_MUX(4);//RMII0_RXD0/MII0_RXD0
PORTA_PCR15 = PORT_PCR_MUX(4);//RMII0_TXEN/MII0_TXEN
PORTA_PCR16 = PORT_PCR_MUX(4);//RMII0_TXD0/MII0_TXD0
PORTA_PCR17 = PORT_PCR_MUX(4);//RMII0_TXD1/MII0_TXD1
* Make sure the external interface signals are enabled
*/
*data;
= PORT_PCR_MUX(4);//GPIO;//RMII0_MDIO/MII0_MDIO
= PORT_PCR_MUX(4);//GPIO;//RMII0_MDC/MII0_MDC
= PORT_PCR_MUX(4);//RMII0_RXER/MII0_RXER
/* control and status */
/* transfer length */
/* buffer address */
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Freescale Semiconductor