TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 57

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TWR-K60N512-KEIL

Manufacturer Part Number
TWR-K60N512-KEIL
Description
K60N512 Keil Tower Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr

Specifications of TWR-K60N512-KEIL

Rohs Compliant
YES
Contents
4 Boards, Documentation, DVD
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Freescale Tower System, K60N512
Chapter 5 Power Management Controller (PMC/MODECTL)
This statement can be placed anywhere in the code and once execute the MCU will enter
the selected low power mode. It takes approximately 1 microsecond to enter the low
power mode.
5.2.2.3 Entering wait mode
If you want to use WAIT mode, then the SLEEPDEEP bit needs to be cleared before
executing the WFI instruction.
SCB_SCR &= ~SCB_SCR_SLEEPDEEP_MASK;
5.2.2.4 Exiting low power modes
Each of the power modes has a specific list of exit methods. In general an enabled
interrupt from a pin, an enabled module trigger, or a reset will exit the low power modes
and return to RUN or VLPR mode. These exit methods are discussed in Section 3 on the
LLWU.
Recovery from VLLSx is through the wakeup reset event. The MCU will wake from
VLLSx by means of reset, an enabled pin, or an enabled module. See table 3-12, "LLWU
inputs," in the LLWU configuration section for a list of the sources. The wakeup flow
from VLLS1, 2, and 3 is through reset. The wakeup bit in the SRS registers is set,
indicating that the MCU is recovering from a low power mode. Code execution begins
but the I/O are held in the pre-low-power mode entry state and the oscillator is disabled
(even if EREFSTEN had been set before entering VLLSx). The user is required to clear
this hold by writing to the ACKISO bit in the LLWU_CS register.
Prior to releasing the hold the user must re-initialize the I/O to the pre-low-power mode
entry state, so that unwanted transitions on the I/O do not occur when the hold is released.
The oscillator cannot be re-enabled before the ACKISO bit is cleared and must be
reconfigured after the acknowledge write has been done.
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Freescale Semiconductor
57

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