TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 169
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
TWR-K60N512-KEIL
Manufacturer Part Number
TWR-K60N512-KEIL
Description
K60N512 Keil Tower Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr
Datasheets
1.TWR-ELEV.pdf
(4 pages)
2.TWR-K60N512-KIT.pdf
(8 pages)
3.TWR-K60N512-KIT.pdf
(17 pages)
4.TWR-K60N512-KEIL.pdf
(181 pages)
Specifications of TWR-K60N512-KEIL
Rohs Compliant
YES
Contents
4 Boards, Documentation, DVD
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Freescale Tower System, K60N512
- TWR-ELEV PDF datasheet
- TWR-K60N512-KIT PDF datasheet #2
- TWR-K60N512-KIT PDF datasheet #3
- TWR-K60N512-KEIL PDF datasheet #4
- Current page: 169 of 181
- Download datasheet (3Mb)
18.2 Configuration example
In this case the ADC is configured simply to read and average singled ended inputs. The
ADC0 inputs are not connected to anything of interest for this demo, but are just
demonstrated to function. ADC1, both when using the “A” registers, and when using the
“B” registers, is configured for channel 20 which matches with the onboard
potentiometer. This means that of the four conversions scheduled, two are for ADC1.
And, both of the ones for ADC1 are on channel 20, which is K2, which is the POT. The
ADCs are configured to be triggered by the PDB and the PDB is configured to output
four triggers each PDB cycle. ADC0 is activated in this case, but also not connected to
the POT. It is also triggered by the PDB; however, its readings do not contribute to the
digital filter resulting in the fifth output of the demonstration program, POT reading.
18.2.1 PDB-triggered single-ended ADC conversions
There are several steps taken in the course of the execution of this demo, involving
setting up the peripherals. These steps are further detailed with code from the adc_demo
project and explained in the sections that follow, numbered after the manner of the steps:
Freescale Semiconductor
1. Turn on clocks to the ADC and PDB module using the SIM module.
2. Configure System Integration Module for defaults as far as ADC.
3. Configure the Peripheral Delay Block (PDB).
4. Determine the configuration the ADC using a structure to store the desired
5. Use the ADC driver to send the desired configuration to the ADC’s.
• 16-bit resolution:
• Differential or single-ended:
The ADC module works with the PDB to trigger the ADC’s conversions. The ADC
trigger to convert is based on configuration choices. In this case the ADC will be
configured to be triggered only by the PDB. The PDB will be triggered by the
application software using an instruction to start its timed sequence of conversions.
Once it does this, it will trigger each conversion in sequence based on its
configurable timers. It will repeat each time its counter wraps, starting another cycle
of conversions of both ADC0 and ADC1. Only the readings from ADC1 will be
filtered and displayed as POT.
The conversion results in this example are 16 bit unsigned.
Single-ended mode is illustrated in this example.
configuration.
Chapter 18 Using Peripheral Delay Block (PDB) to Schedule Analog to Digital Converter (ADC) Conversions
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
169
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