TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 37

• Manufacturer Part Number: TWR-K60N512-KEIL
• Description: K60N512 Keil Tower Kit
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr
• Type: MCUr

Specifications of TWR-K60N512-KEIL

• Rohs Compliant: YES
• Contents: 4 Boards, Documentation, DVD
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Freescale Tower System, K60N512

Freescale Semiconductor
1. Identify the vector number and the IRQ number of the module from the vector table
2. Determine which NVICSERx register contains the IRQ. Each NVICSERx register
3. To know which bit to set perform a modulo operation to obtain the remainder by 32
4. At this point, the interrupt for the LPTMR can be configured:
5. Next, set the interrupt priority level. This is application dependent. On Kinetis MCUs
6. After the NVIC registers are set-up, finish the peripheral configuration that must
7. In the ISR, clear the peripheral interrupt flag to avoid re-entrance. For this example:
in the device-specific reference manual in the section Interrupt Channel
Assignments. For the LPTMR the vector is 101.
contains 32 IRQs. Therefore, the NVICSER0 can enable from IRQ 0 to IRQ 31, the
NVICSER1 from IRQ 32 to IRQ 63, and NVICSER2 from IRQ 64 to IRQ 95. For
this example, the NVICSER2 is used because the LPTMR IRQ is 85. The
NVICCPRx takes on the same number, in this case NVICCPR2.
of the IRQ number. This number is used to enable the interrupt on NVICSER2 and to
clear the pending interrupts from NVICCPR2.
Example:
LPTMR BIT = 85 mod 32
LPTMR BIT = 21
NVICICPR2|=(1<<21);
NVICISER2|=(1<<21);
there are 16 different priority levels. To set the priority, write to the NVICIPxx
register, the “xx” represents the IRQ number, in this example, NVICIP85. Note the
most significant nibble is used to set-up the priority, the lower nibble is reserved and
reads as zero. The LPTMR example sets the priority to 3:
NVICIP85 = 0x30;
enable the interrupt.
Address
0x0000_018C
0x0000_0190
0x0000_0194
//Set Priority 3 to the LPTMR module
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
//Clear any pending interrupts on LPTMR
//Enable interrupts from LPTMR module
Vector
99
100
101
Table 3-2. LPTMR
IRQ
83
84
85
Chapter 3 Nested Vector Interrupt Controller (NVIC)
vector
Source Module
TSI
MCG
LPTMR
Source Descrip‐
tion
Single interrupt
Source
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