TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 35

• Manufacturer Part Number: TWR-K60N512-KEIL
• Description: K60N512 Keil Tower Kit
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr
• Type: MCUr

Specifications of TWR-K60N512-KEIL

• Rohs Compliant: YES
• Contents: 4 Boards, Documentation, DVD
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Freescale Tower System, K60N512

Chapter 3
Nested Vector Interrupt Controller (NVIC)
3.1 Overview
This chapter shows how the NVIC is integrated into the Kinetis MCUs and how to
configure it and set-up module interrupts. It also demonstrates the steps to set the
interrupts for the desired peripheral and how to locate the vector table from flash to
RAM.
3.1.1 Introduction
The NVIC is a standard module on the ARM Cortex M series. This module is closely
integrated with the core and provides a very low latency for entering an interrupt service
routine ISR (12 cycles) and exiting an ISR (12 cycles).
The NVIC provides 16 different interrupt priorities. Priority 0 is the highest and the
lowest is15. This can be used to control which interrupt must be serviced. For example,
on a motor-control application if a UART and a timer interrupt occur at the same time,
serving the timer interrupt that moves the motor is more critical than the UART interrupt
that just received a character. In this case, the timer priority must be set higher than the
UART.
3.1.2 Features
On Kinetis MCUs the NVIC provides up to 120 interrupt sources including 16 that are
core specific. It also implements up to 16 priority levels that are fully programmable. The
NVIC uses a vector table to manage the interrupts. This vector table can be stored in
either flash or RAM, depending on the application.
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Freescale Semiconductor
35