STM32W108HBU6 STMicroelectronics, STM32W108HBU6 Datasheet - Page 161

• Manufacturer Part Number: STM32W108HBU6
• Manufacturer: STMicroelectronics

Specifications of STM32W108HBU6

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Processing Unit: Microprocessor
• Operating Supply Voltage (min): 1.18V
• Operating Supply Voltage (typ): 1.25V
• Operating Supply Voltage (max): 1.32V
• Package Type: VFQFPN EP
• Pin Count: 40
• Mounting: Surface Mount
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

STM32W108CB, STM32W108HB
Note:
11.1.7
Table 30.
ADC sample timing is the same whether the STM32W108 is using the 24 MHz crystal
oscillator or the 12 MHz high-speed RC oscillator. This facilitates using the ADC soon after
the CPU wakes from deep sleep, before switching to the crystal oscillator.
Operation
Setting the ADC_EN bit in the ADC_CFG register enables the ADC; once enabled, it
performs conversions continuously until it is disabled. If the ADC had previously been
disabled, a 21 µs analog startup delay is imposed before the ADC starts conversions. The
delay timing is performed in hardware and is simply added to the time until the first
conversion result is output.
When the ADC is first enabled, and or if any change is made to ADC_CFG after it is
enabled, the time until a result is output is double the normal sample time. This is because
the ADC’s internal design requires it to discard the first conversion after startup or a
configuration change. This is done automatically and is hidden from software except for the
longer timing. Switching the processor clock between the RC and crystal oscillator also
causes the ADC to go through this startup cycle. If the ADC was newly enabled, the analog
delay time is added to the doubled sample time.
If the DMA is running when ADC_CFG is modified, the DMA does not stop, so the DMA
buffer may contain conversion results from both the old and new configurations.
The following procedure illustrates a simple polled method of using the ADC. After
completing the procedure, the latest conversion results is available in the location written to
by the DMA. This assumes that any GPIOs and the voltage reference have already been
configured.
1.
2.
3.
4.
5.
6.
ADC_PERIOD
Allocate a 16-bit signed variable, for example analogData, to receive the ADC output.
(Make sure that analogData is half-word aligned – that is, at an even address.)
Disable all ADC interrupts – write 0 to INT_ADCCFG.
Set up the DMA to output conversion results to the variable, analogData.
Reset the DMA – set the ADC_DMARST bit in ADC_DMACFG.
Define a one sample buffer – write analogData’s address to ADC_DMABEG, set
ADC_DMASIZE to 1.
Write the desired offset and gain correction values to the ADC_OFFSET and
ADC_GAIN registers.
Start the ADC and the DMA.
Write the desired conversion configuration, with the ADC_EN bit set, to ADC_CFG.
Clear the ADC buffer full flag – write INT_ADCULDFULL to INT_ADCFLAG.
Start the DMA in auto wrap mode – set the ADC_DMAAUTOWRAP and
ADC_DMALOAD bits in ADC_DMACFG.
Wait until the INT_ADCULDFULL bit is set in INT_ADCFLAG, then read the result from
analogData.
6
7
ADC sample times
Sample
Clocks
2048
4096
1 MHz clock 6 MHz clock 1 MHz clock 6 MHz clock
2048
4096
Sample Time (µs)
Doc ID 16252 Rev 7
341
682
Sample Frequency (kHz)
0.488
0.244
Analog-to-digital converter
2.93
1.47
Significant
Bits
11
12
161/208