LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 140

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LAN9303MI-AKZE

Manufacturer Part Number
LAN9303MI-AKZE
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9303MI-AKZE

Lead Free Status / Rohs Status
Compliant
Revision 1.4 (07-07-10)
10.4.4
Port 0 PHY Mode I
In PHY mode I
accessed via the external MII management pins. The SMI slave is not used in this mode.
The Virtual PHY and PMI parallel interfaces are accessible via the I
Loader. Refer to
Figure 10.2
Figure 10.4 MII Mux Management Path Connections - PHY Mode I
MDI
MDCLK
MDI
MDCLK
MDI
MDCLK
MDI
MDCLK
Virtual PHY
SMI Slave
details the MII multiplexer management path connections for this mode.
Mode Selection
PHY2
PHY1
Management
Parallel
Parallel
Master
Slave
2
C managed, the Port 1/2 PHYs are accessed via the PMI, and the Virtual PHY is
Section 8.4, "EEPROM Loader," on page 120
MDIO_ DIR
MDIO_ DIR
MDIO_ DIR
MDIO_ DIR
MDO
MDO
MDO
MDO
2
C Managed
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
DATASHEET
140
Mode Selection
Management
MDO MDCLK
Parallel Slave
PMI
MDI
for additional information.
MDO_EnN
2
C slave interface or the EEPROM
2
C Managed
SMSC LAN9303M/LAN9303Mi
MDO
MDI
MDC_DIR
MDC_ OUT
MDC_IN
MDIO_DIR
MII Pins
MDIO
MDC
Datasheet

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