LAN9303MI-AKZE Standard Microsystems (SMSC), LAN9303MI-AKZE Datasheet - Page 154

• Manufacturer Part Number: LAN9303MI-AKZE
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9303MI-AKZE

• Lead Free Status / Rohs Status: Compliant

Revision 1.4 (07-07-10)
13.2.2
13.2.2.1
31:22
21:16
BITS
15:6
5:0
RESERVED
GPIO Interrupt Polarity 5-0 (GPIO_INT_POL[5:0])
These bits set the interrupt polarity of the GPIO pins. The configured level
(high/low) will set the corresponding GPIO_INT bit in the
I/O Interrupt Status and Enable Register
0: Sets low logic level trigger on corresponding GPIO pin
1: Sets high logic level trigger on corresponding GPIO pin
RESERVED
GPIO Buffer Type 5-0 (GPIOBUF[5:0])
This field sets the buffer types of the GPIO pins.
0: Corresponding GPIO pin configured as an open-drain driver
1: Corresponding GPIO pin configured as a push/pull driver
As an open-drain driver, the output pin is driven low when the corresponding
data register is cleared, and is not driven when the corresponding data
register is set.
GPIO/LED
This section details the General Purpose I/O (GPIO) and LED related System CSR’s.
General Purpose I/O Configuration Register (GPIO_CFG)
This read/write register configures the GPIO input and output pins. The polarity of the GPIO pins is
configured here.
Offset:
1E0h
DESCRIPTION
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
DATASHEET
(GPIO_INT_STS_EN).
154
Size:
General Purpose
32 bits
SMSC LAN9303M/LAN9303Mi
TYPE
R/W
R/W
RO
RO
DEFAULT
Datasheet
0h
0h
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